Can you share your project with public? we will check.

project is now public [https://easyeda.com/](https://easyeda.com/)assafi/Soundcard\_Protection\_Circuit\-8f96eb5d0d8c4124a949961697295e2e

@assafi, It takes a few tens of seconds but **Export Netlist > Spice for this Sheet...** works OK for me: 

Hi Andy, Unfortunately I do not share your results, although we both netlist the same scheme I am still getting the error: "Failed to load spice data". I have attached a figure of the error... Regarding a Professional account: 1. Will I get priority with respect to simulation, or will I have to wait 2min between runs? 2\. Simulating a different circuit\, I am able to run a transient simulation using "tran 1e\-4 0\.1"\, but when I set step to 1e\-5 I get a timeout message\. Is this solved using a Professional account? Thank You Assaf 

Hi we don't provide the professional account yet, all account's function are the same. we will change this 2minutes rule in the future. please try to export the spice netlist again, sometimes the server will fail to generate the netlist.

@assafi, I'm not sure but it _may_ help the spice netlisting if you replace the netlabel "gnd" between C7 - C10 and C11 - C14 and at pin 2 of connector P7 with a ground symbol. Another problem may be that you have left both ends of C1 - C4 unconnected. This means that they are floating and so have no DC path to ground. This _may_ upset the netlisting process. Your current schematic has nothing connected to C1 - C4 but the cover picture on the project page shows that you had these components connected in some earlier version, which would avoid this issue. * Every node in a spice simulation must have a DC path to ground. Please see "Every point in a simulation schematic MUST have a DC path to ground" and the following sections in the EasyEDA Simulation eBook: [https://docs.easyeda.com/en/Simulation/Chapter4-Introduction-to-using-a-simulator/index.html](https://docs.easyeda.com/en/Simulation/Chapter4-Introduction-to-using-a-simulator/index.html)

@assafi, "...I am able to run a transient simulation using "tran 1e-4 0.1", but when I set step to 1e-5 I get a timeout message." If you use the **Tools > Simulation > Simulate this Sheet... >** Run Your simulation dialogue box then you are limited to (Stop time)/(Max timestep)

@assafi, Sorry. Either I had finger trouble or there was a problem with parsing some characters I used in my previous post. "...I am able to run a transient simulation using "tran 1e-4 0.1", but when I set step to 1e-5 I get a timeout message." If you use the: **Tools > Simulation > Simulate this Sheet... >** Run Your simulation dialogue box then you are limited to (Stop time)/(Max timestep) LTE 1k. If you use the .TRAN statement directly in the schematic as described in: [https://docs.easyeda.com/en/Simulation/Chapter6-Advanced-probing-and-simulation-control/index.html#Using-CTRL-R-to-run-a-simulation-directly](https://docs.easyeda.com/en/Simulation/Chapter6-Advanced-probing-and-simulation-control/index.html#Using-CTRL-R-to-run-a-simulation-directly) then you can use (Stop time)/(Max timestep) LTE 10k.

Hi Andy, Thank you for your help. In your fist answer you mentioned that you were able to netlist the project...therefore I do not think it is related to the capacitors and the GND symbol... Anyway, I have added all the relevant devices you suggested but....No netlist... I had various versions... none of them were able to netlist/simulate. Only when I stripped down the circuit to regulator and an Opamp was I able to simulate. The stripped version is here: [https://easyeda.com/](https://easyeda.com/)assafi/spice_subckt2 Is there an option that connectivity is causing these issues? Assaf

Hi Andy, I have a two suggestions: 1\. User should view all output files\, even netlist errors\. 2\. All components should have the option of being netlisted \(you're already using it for PCB LVS\)\. Assaf

@UserSupport, @assafi, I have both tried generating spice netlists from both of Assaf's public projects and also with my own copies of them. Sometimes a spice netlist is generated. Sometimes only the message "Failed to load spice data" is displayed. * The conclusion I have come to is that this is a resource issue in the cloud. I suspect that when the servers are busy actually running simulations, then they run out of resources to just parse schematics to generate spice netlists for them.

@andyfierman @assafi Hi This issue is confirmed, we are try to fix it now, that is a little complicate, need some time. at present, please try serveral times to export the spice netlist. thank you

Thank you for your support, hopefully this issue will be solved in the near future, until then I think I will try simulating using my local simulator. In addition, is there an shareware LVS tool I can use to compare the netlist I get from you vs the one I am simulating? Thanks again, Assaf

I can recommend LTspiceXVII for your simulation needs. For netlist comparison, you could try the Windows port of: [http://www.caffeinated.me.uk/kompare/](http://www.caffeinated.me.uk/kompare/) or: [http://kdiff3.sourceforge.net](http://kdiff3.sourceforge.net/)