As discussed elsewhere in the forum, it is possible to temporarliy rename segments of nets so you could apply a different rule to the renamed segment but that really only swaps the DRC error about minimum width for a DRC error about misconnected nets. Another possibility is to design the segment of net that you want to use as a current sense resistor and then create a dedicated schematic symbol and an associated PCB footprint for it. Then you can place it in the schematic, update the pcb to pull the footprint in and place it where yuo want and the DRC won't care about the width because it sees it as a footprint not a track. A lot of work and very inflexible because you can't change the routing if you need to but it does avoid a DRC error.

Ah ok - option 2 works.  Bit of a restriction not being able to declare high and low current parts of a net though - most other PCB tools had that a long time ago.

Feature Request? :)

@andyfierman Still waiting for any feedback on the other ones I suggested.  They are fixing the ultra-thin ground plane issue though