Copper Area (copper plane) not registering vias and pads
31 1
Shant Centistoke 5 days ago
The copper area tool has two issues I have not been able to work around. 1- (less critical) Its very annoying that the CAD does not form a copper area in which there is less than 2 pads or vias. This is very annoying when you need to create a guard plane (on the inner or outer layers) with one node of contact such as one via or one pad for the entire copper plane. 2- Sometimes the Copper Area tool does not register that a via or pad is of a different potential and still creates a bond with it. Its very difficult to break this bond, and sometimes it DOES NOT break the bond. One must fiddle with it until it works. Such as using the "rebuild copper area" tool over and over again and changing the net names of the vias or pads in differing orders to make it recognize that it should not form a bond with it. Example: I create a ground plane and it forms bonds with ONLY the pads and vias that are set as ground in the NET. Then I add a new pad or via that is NOT ground, and rebuild copper area to exclude it from the plane. It does NOT break the bond and I must fiddle sometimes for 30 minutes, and sometimes it doesnt even work at all. Great software in general, but this particular issue weighs a lot.
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andyfierman 5 days ago
"...the CAD does not form a copper area in which there is less than 2 pads or vias." Sorry but I cannot reproduce this issue. Here's copper area filled around a single via: ![image.png](//image.easyeda.com/pullimage/etdv5Noj8USLXkbHyQGrecGj6Fy1v9BvZneU8qWd.png) Are you sure that you have named the vias, pads, nets and the copper area all the same? "...create a ground plane and it forms bonds with ONLY the pads and vias that are set as ground in the NET. Then I add a new pad or via that is NOT ground, and rebuild copper area to exclude it from the plane. It does NOT break the bond and I must fiddle sometimes for 30 minutes, and sometimes it doesnt even work at all." Can't reproduce that either: ![image.png](//image.easyeda.com/pullimage/6v6nueELsC0DyN2LWjobRJIjVKMEYa5F4bzTgvHl.png) Can you post the link to a public project that demonstrates this behaviour? If it is in a 4 or more layer PCB then this topic, in particular the last 3 posts, may be relevant: [https://easyeda.com/forum/topic/Copper-Area-Add-Rmove-Vias-not-working-or-feature-not-clear-ff0ea29cb3ff4fac8be76b56e7bf9a37](https://easyeda.com/forum/topic/Copper-Area-Add-Rmove-Vias-not-working-or-feature-not-clear-ff0ea29cb3ff4fac8be76b56e7bf9a37)
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