How can I overcome (or ignore) DRC errors related to cutouts?
I have a component with a package that includes a pcb cutout (MICRO 5P_C40940). In addition, I also have a multilayer board cutout solid region. I'm getting DRC errors on both, the package cutout is too close to the pads (of the same package), and the solid region cutout is too close to the ground plane copper area, which it should cut. Both seem to me like false errors I would like to either fix, workaround or ignore.
(EasyEDA V6.2.46)
Any idea?
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