They shouldn't. If you check the Gerbers, you'll see just the cutout, not the inner border line.

@andyfierman Hi again Andy! I have been running into one error after another trying to get this P.S. board out. After you answered my 1 question Re: outlines from keep-out areas, I was tempted to ask a couple more questions, but realized;  A) I did not want to say I didn't try to figure it out on my own, and;  B) You have to sleep sometime! : ) Plus I see some of the pleas from others asking for some-one to design their circuits for them. Frankly, I don't know how you remain so diplomatic. And I don't want to be one of the many who don't work to find the answer before I go asking for help. Any way, I did want to say how extremely useful the video examples have been. In just a few seconds I can completely understand the proper ways to use vias, (on this software), as I was having fits trying to figure out why my nets weren't connecting, then for the first time, I used a Gerber preview and found the issue. I then found the video on using vias and problem solved. The video on using keep-out areas was just a few seconds again to learn that. No-one in this company is a dedicated layout person. And with the consulting work we also do, that is why I have taken so long to get a large enough block of time to spend on finishing this project. Bottom line, I wanted to thank you for all your help. I have been telling Craig (the owner of the Company), how much I like working with your company and suggested EDA be our default for all our PCB work. He has agreed. Thanks again, and Regards, -Lisa Dalton. C-Squared Engineering

Lisa, Many thanks for your very kind comments. Your recommendation to Craig (and his agreement!) is a really great endorsement for EasyEDA and we all look forward to supporting you as you finish this and in your future projects. I should explain though that I can't take credit for the videos: they've all been done by the EasyEDA Team in China. I act as part of the wider team in supporting the forums, providing simulation support, spice models, spice and special symbols and PCB packages. The real credit goes to Dillon and Eric's EasyEDA team as the creators of this wonderful tool and to the people at LCSC and JLCPCB for supporting it's development.

Hi Lisa Do you mean you want a Keep-out layer like Altium designer's keep-out layer? Yes, we will support this in the future, it was added on to do list. thank you.