DRC Clearance Issues despite having defined a low enough value in the DRC
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JFK422 1 week ago
Hi All So I stumbled upon this issue that I get a DRC clearance error despite having defined a lower clearance value in the DRC. This issue arises from the pads to vias and form the pads to pads. It happens with every package below 0.3mm. I tried replacing some packages with similar ones. Thou the same issue. ![DRC Readout](//image.easyeda.com/pullimage/IoTCY3lcRKSZbfYOycpFYSCpS7fdxNH8JtlMafje.png) ![DRC Issue example](//image.easyeda.com/pullimage/bAtqnFoOOItGL1SUNPfvZcP65KYySKDqFM8R9Pgo.png)
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UserSupport 1 week ago
please ignore it by mind, EasyEDA doesn't support to ignore the footprint inside DRC error.
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