Hi all, I finally completed my latest PCB design but have 3 DRC errors which I cannot find/clear. They are clearance errors located at J2 pins 3 4 and 5. Anyone care to have a look at it for me to see what I'm missing please. The projest can be found here [https://easyeda.com/bobbuckfield/mes_tsma2](https://easyeda.com/bobbuckfield/mes_tsma2) if that's the right thing to do. Cheers.
Edit.
All sorted, I had drawn the PCB symbol using the top layer rather than the top silk layer. I''l get the hang of it eventually I'm sure LOL.
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