My project suddenly started to display numerous DRC errors. I left my project with no DRC errors about two weeks ago but since I accessed it in the last Friday, May 25th, numerous DRC errors are displayed regardless of DRC settings. These are pad-to-pad and track-to-pad errors with no apparent reason. Some of these DRC errors seem to be associated with elements crossing or located within solid-region-cutout objects introduced to prevent copper fill in certain areas. Other DRC errors seem to be associated with a specific package PG-TDSON-8 in two possible ways: certain pads of package overlaps each other or package's pads interfere with introduced thermal vias. I followed thread 'False DRC errors' but the version V5.5.8 does not solve my problem. The project is not public, please tell if you need it sent to [support@easyeda.com](mailto:support@easyeda.com).