You need to use EasyEDA editor to create some projects before publishing
DRC errors with repositioned or removed components
470 4
Perry Paolantonio 2 years ago
I'm getting a ton of DRC errors: One is that the auto-routed object clearances (such as vias that the auto-router placed) are wrong. I changed the DRC rule slightly and these went away (there appears to be a rounding error or something - it was telling me the via was 0.61234 or something like that, when it should be .61 (I forget the exact number it was reporting). Another, somewhat more concerning, is that there's incorrect clearance on holes and vias that don't exist. See this image. The yellow X is showing where it thinks there's a via, but as you can see, there is not. I think I had some manually placed vias there, which were wiped out by the auto-router when I repositioned things and ran it again. I'm seeing something similar with holes too, where connectors were, but were subsequently moved to another location on the PCB. I think it thinks there's still something there, but I cannot find any trace of the connector that moved. I have a bunch of these -- 4 connectors, each with 4-6 holes, were moved around. If there's nothing there, can I ignore this, or is it going to trip things up when I submit my order (which I'd like to do today)? I can't see any sign of anything in these locations, on any layer. <br> <br> ![Screen Shot 2021-07-13 at 09.36.38 AM.png](//image.easyeda.com/pullimage/tROSpF5iHf2L5BbkJnbRnJVSqrgztPHBBj0CcfxG.png)
Comments
andyfierman 2 years ago
Make sure that you rebuild the Copper Areas (SHIFT+B) before rerunning the PCB Design Manager DRC.
Reply
Perry Paolantonio 2 years ago
Aha! Thanks. That did the trick. Shouldn't that happen automatically as part of the auto-routing process though?
Reply
Perry Paolantonio 2 years ago
Wait - sorry, I spoke too soon. I had something in the filter field that was hiding the errors. Even after rebuilding the copper areas, all the phantom holes and vias are still there.
Reply
Perry Paolantonio 2 years ago
Ok, so turns out my bottom layer was locked. When I unlocked it, it suddenly revealed all of the phantom vias and holes, from before things were repositioned. Deleting those fixed the DRC errors: ![Screen Shot 2021-07-13 at 11.23.05 AM.png](//image.easyeda.com/pullimage/pb3tBixazE5MmrYUs7EUgvcZynnCN1xWasdHqjXk.png)
Reply
Login or Register to add a comment
goToTop
你现在访问的是EasyEDA海外版,使用建立访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
svg-battery svg-battery-wifi svg-books svg-more svg-paste svg-pencil svg-plant svg-ruler svg-share svg-user svg-logo-cn svg-double-arrow -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus-@1x -mockplus-

Cookie Notice

Our website uses essential cookies to help us ensure that it is working as expected, and uses optional analytics cookies to offer you a better browsing experience. To find out more, read our Cookie Notice