On my PCB some components used inner layers, but when I deleted inner layers easy EDA dont write Ratlines. Like this: ![2020-12-04-105930_1920x1080_scrot.png](//image.easyeda.com/pullimage/DUznpMd07Qh8uWUAC7s8cOrmnAzxbvVzBuiZQeGX.png)
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