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Drc errors with library component
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Mario Muratori 5 years ago
hi i'm new to pcb design. only done electronics for hobby. i tried to design a simple pcb for using TPS63070 from texas instrument , connecting its pads to a male header to use with bredboard easily. so my circuit and my pcb are very simpler: each pad of the TPS is connected to one pin of the header. here is the link of the project: [https://easyeda.com/mario.muratori86/myproject1](https://easyeda.com/mario.muratori86/myproject1) i have few questions: 1) since pad 12 and 13 and also 7 and 8 are connected in the TPS footprint (and that is correct, viewing TI datasheet), when i try to connect a track to it, i always get some DRC error about clearance being less than 6 mil how can i correct this? and also i would like to use a wider trace for these pads. is there a way to properly use a trace that is large 3 times one pad (3*10 mil), to connect with these pads? or maybe an area of copper ? what should i use???? 2) is it possible to receive pcb with TPS already soldered on it ??? ( i read similar question but still i dont know if it is possible) 3) is it possible to overlay a text over a trace ? 4) what is the best way to enlarge a trace starting from 10 mil, for example, to have 30 mil ???? 2 traces connected, or a copper area, or solid region? thx for any help, i really appreciate your software and want to try really your pcb service ;)
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UserSupport 5 years ago
You need to set the object's net as the same, if difference net of the object connected together, will cause the DRC error which name "Clearance" ![image.png](//image.easyeda.com/pullimage/WWhSEN8dnyzXyBFitZRoToEmWCQizEtphTVPn7Hd.png) ![image.png](//image.easyeda.com/pullimage/MXlq0KuBGLCKYwXTYeTy0ePoxWRDFNrXRW51uCPx.png)
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EasyEDA 5 years ago
@Mario Muratori, @UserSupport, * There are two problems with the LCSC 15-VQFN-HR footprint. This post describes how to correct the most urgent issue. My next post will deal with the second issue. The problem here is that the pads on the 15-VQFN-HRPCB Footprint assigned as to the TPS63070 schematic symbol are not well constructed. Even though they are numbered separately on the package, pads 7 & 8 (and 12 & 13) are physically a single U shaped pad. ![image.png](//image.easyeda.com/pullimage/V4605g67fNoJiFFeIixxcKkJ3la3W5Sc0y9i8jzu.png) In the footprint they are numbered separately and have been bridged using an un-numbered pad. The symbol only has pins 7 and 12: ![image.png](//image.easyeda.com/pullimage/POcVWZ1SGp769cc82dsatK2mabkRujqgyziuHRvJ.png) The best way I have found way to deal with this sort of situation is to number pad 8 and the un-numbered bridging pad both as pad 7 and number pad 13 and the un-numbered bridging pad both as pad 12: ![image.png](//image.easyeda.com/pullimage/wa4EXY5ZqkpWYX813vA9fA57dP6s4DNkDJB5LTpW.png) I have also added numbering to the Document layer to clarify. I have added this footprint to the System Library as: **TPS63070** If you change the **Package** attribute of the the TPS63070RNMR schematic symbol from **15-VQFN-HR** to **TPS63070** then do Update PCB... the new package will be pulled in and the DRC errors will disappear. @UserSupport, Please ask LCSC to copy my **TPS63070** footprint into thier **15-VQFN-HR** as I no longer seem to have access to do this.
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EasyEDA 5 years ago
@UserSupport, The second problem with the **15-VQFN-HR** footprint is there is a difference between the pad and solder mask configuration between pins 1 - 6, 14 and 15 and pins 7 - 13. Normally the aperture in the solder mask is larger than that size of the pads. In the **15-VQFN-HR** footprint however, the solder mask for pins 7 - 13 is required to be created so that the copper of the pad extends _under_ the solder mask as shown in the datasheet: ![image.png](//image.easyeda.com/pullimage/w8CpcJccRWy5hNE8gxjrv73gb9SKSMZgQLZl4H6P.png) At the moment, it is not possible to do this in EasyEDA because it does not allow a negative Solder Mask Expansion (i.e. a solder mask contraction). I think this has already been raised as a Feature Request but I think this isuue highlights the need for it to be supported sooner rather than later.
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andyfierman 5 years ago
@Mario Muratori, To answer your other questions: `2) is it possible to receive pcb with TPS already soldered on it ??? ( i read similar question but still i dont know if it is possible)` Not yet. This is taking a long time to introduce. `3) is it possible to overlay a text over a trace ?` Yes but avoid doing that over pads. If you overlap text onto a pad, it will be removed in the area of the pad durinf board fabrication. Also check that you have put text into silkscreen or Document layers and not in a copper layer! `4) what is the best way to enlarge a trace starting from 10 mil, for example, to have 30 mil ???? 2 traces connected, or a copper area, or solid region ?` 2 traces connected To help you get up to full speed with EasyEDA, please read: [https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f)
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UserSupport 5 years ago
@andyfierman For this footprint, I have add the pad number for the empty pad. it should work now.
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EasyEDA 5 years ago
Not quite what I meant. You have to change pin 8 to pin 7 and change pin 13 to pin 12. That is why I added to actual pin numbers in the Document layer. I have tried several different ways to deal with packages that have duplicate pins or more pins than on the symbol but the easiest way I have found to deal with it is simply to number the pads on the footprint the same as those on the symbol. So for example a NPN bjt with a 3 pin symbol that is connected like this: 1 = Base 2 = Collector 3 = Emitter but is in a SOT-223  package with 3 pins and a metal tab that is connected like this: 1 = Base 2 = Collector 3 = Emitter Tab = Collector then I number the PCB footprint pads like this: 1 = Base 2 = Collector 3 = Emitter 3 = Collector That keeps the Footprint Manager happy and keeps the Design Manager happy. * It is also absolutely clear in the PCB that the collector pins are actually connected together on the real device and so avoids any mistake of for example, accidentally connecting the tab to ground when the collector may be connected to a supply rail! If you do not do this then you have to create a special schematic symbol that has two collector pins. I have done this for some devices but it makes the schermatic messy and is unnecessary. :)
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EasyEDA 5 years ago
I also moved the pin 1 dot very slightly so it did not overlap pin 15. :)
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UserSupport 5 years ago
@EasyEDA I add two pins for schlib, it should works now. :) ![image.png](//image.easyeda.com/pullimage/CDc4WUvvEcPygHPzcSedSklG5kPQ3U7digsS9JDi.png)
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andyfierman 5 years ago
But does not hat not create a DRC error because two pads in the footprint are overlapping? It also complicates what was a simple symbol that looks just like the one in the TI datasheet. This is what I was talking about when I said: "If you do not do this then you have to create a special schematic symbol that has two collector pins. I have done this for some devices but it makes the schermatic messy and is unnecessary."
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andyfierman 5 years ago
Sorry but I don't see what's wrong with doing it as in my TPS63070 footprint: ![image.png](https://image.easyeda.com/pullimage/wa4EXY5ZqkpWYX813vA9fA57dP6s4DNkDJB5LTpW.png)
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andyfierman 5 years ago
@UserSupport, * Yes: you still get DRC errors because there are two pads with different numbers overlapping: ![image.png](//image.easyeda.com/pullimage/jRVdb3sRJjUx56GS4ej4LnaxutwZca5YLbwq0x3j.png) * I'm a great believer in keeping things as simple as possible (KISS, Occams Razor and others probably much older...) If you go back to the original schematic symbol with no pin 8 and no pin 13: ![image.png](https://image.easyeda.com/pullimage/POcVWZ1SGp769cc82dsatK2mabkRujqgyziuHRvJ.png) and simply copy the JSON for my **TPS63070** footprint into your **15-VQFN-HR** footprint then all the problems go away. :)
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andyfierman 5 years ago
@UserSupport, For Info: This is the post asking about a negative mask expansion: [https://easyeda.com/forum/topic/Allow-negative-Paste-Mask-Expansion-and-Solder-Mask-Expansion-coefficient-58634b7b30794c6da17e368c4e2ac68f](https://easyeda.com/forum/topic/Allow-negative-Paste-Mask-Expansion-and-Solder-Mask-Expansion-coefficient-58634b7b30794c6da17e368c4e2ac68f)
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Mario Muratori 5 years ago
hi guys thanks a lot for your answers !!!!!!!!!!! just logged in, it will take a moment to understand everything you told me, i will later comment again if everything goes right.
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Mario Muratori 5 years ago
well, nice job both! the first solution was the easiest one: changing pad net to the same for pads and trace. it worked immediately. the second solution provided by easyeda, the ones in which pad 8 and 13 are named 7 and 12, and also the connection beetween them, is very good: it doesnt insert in the schematic pads that does not exist in the integrated circuit , and only changes the footprint. but now it is not usable, because if i open a new project and insert a new TPS63070, now the schematics contains also pad 8 and 13 (after usersupport changes), and if used applying TPS63070 footprint by easyeda, when i try to convert/update to pcb, it gives me now an error because there are pin 8 and 13 in the schematics that could not find pad 8 and 13 in the TPS63070 footprint. so now if i take the TPS schematic, add to a schematic, then convert to pcb, the only way to convert without errors is to use the footprint which comes with it by default, the 15-VQFN-HR footprint. so i will end up using the default footprint that comes with it, and try with it if there are errors or not. i also have still to read those links you posted easyeda thx both ;) ;) ;)
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andyfierman 5 years ago
I will create a copy of the original TPS63070 schematic symbol and put it in the System library. :)
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andyfierman 5 years ago
@mario.muratori86, There is now a TPS63070 and a TPS630701 schematic symbol in the System library. Both omit pins 8 and 13 and both call up the TPS63070 footprint. They do not have the link to the LCSC page in the Search Libraries entry that the original LCSC parts have but they have identical BoM information attached to the symbols so they will create the same information when you generate a BoM using these symbols. They also have clear Descriptions containing links to other information and a note about the shorted pins 7 & 8 and 12 & 13.
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UserSupport 5 years ago
@andyfierman Sorry, My bad, I change it now, it should works now.
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andyfierman 5 years ago
@UserSupport, A couple more little things please. The symbol and footprint for the TPS630701RNMT in the LCSC library have the same problem. This is why I also created a System symbol for the TPS630701 using the same symbol and footprint as the TPS63070 System part. 1. Can you add the pin numbers that I put on the Document layer too? 2. Can you then copy the symbol and the footprint for the TPS63070RNMR into the TPS630701RNMT? They are exactly the same device except that the TPS63070 is an adjustable output whereas the TPS630701 is a fixed 5V output part: ![image.png](//image.easyeda.com/pullimage/C55J2opls8K03PavOJx3Pn8aNEewdM8mi6fQ7xBq.png)
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