Your project is private so only you can see it. Can you make an example of what you are asking about into a public project and share the url to it?

@andyfierman Sorry forgot to set it public. Just did it, `[you can reach it here](https://easyeda.com/jacopo.franco333/pespositoruler).`

Both of your PCBs have a long list of DRC Errors. Please read and execute the checklists in (2) in: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a) As it happens, the answer to your question is that same in either case but for future reference: because you have two versions of the PCB, one using headers on it; the other using an array of pads in the same locations as the pads for the headers, please be clear which PCB you are asking about. Here's what to do: 1. Make the relevant **copper** layer visible; 2. Select the pads for which you wish to close off the Paste Mask apertures;  3. Set a **negative** Paste Mask Expansion of equal to or greater than half the smallest pad dimension. For example, if the pad is 2mm x 4mm then half the smallest dimension would be 1mm so setting the Paste Mask Expansion to **-**1mm would close the aperture: 

@andyfierman Thank you, that fixed it. Regarding the DRC rules: I'm aware of them. Some are related to the USB connector wich has the silkscreen going a bit too much on the outer side, but shouldn't be a practical problem. Other are related to some aesthetic solid regions that are not used in any way, so shouldn't be a big problem(?). I saw that there are issues with the accelerometer pads and the USB clamping diodes but I asked directly JLPCB about it and they said the clearance is enough anyway. I may add custom rules for those traces to make the project cleaner if you think that should be the case. Best