According to: [https://jlcpcb.com/capabilities/pcb-capabilities](https://jlcpcb.com/capabilities/pcb-capabilities)<br> <br> JLCPCB do not yet support blind or buried vias. EasyEDA Std does not support blind or buried vias. I am not sure about Pro. So you will have to use simple multi-layer vias and if you really don't want GNDs on different layers connected by GND vias then you will have to manually add Solid Regions set to No Solid around the vias on layers you do not want to connect together.

Should you really have PWR right under some of the high speed Ethernet tracks anyway ?  Can't you move them to the side as obviously power to the connector doesn't worry about length. Another way to do what Andy describes is to give the Ethernet GNDs a different name (EGND) and then merge them with a 0 Ohm resistor somewhere.

@andyfierman   Thanks Andy. I had thought of making holes in the layers to accomplish the same effect, but am told I really need separate planes for power and GND. When in layer manager I try to switch from Signal to Plane I am told to first delete all objects from that layer. As far as I can tell there no "objects" on either inner layer. What am I not seeing?

@wellsight I always leave the inner layers as Signal, and then lay out a ground and power plane the size of the whole board on each layer.  I'm not aware of this causing any problems.