Gerber Generator not creating bottom solder mask properly
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cjohnson 6 days ago
Just placed an order for some boards, and received a message back from JLC that the bottom solder mask layer was not present. Inspected my gerber files, and there is a bottom solder mask file present, but no matter what software I use the bottom solder mask does not show up. In fact it crashes GerbView software when I try to add the layer, top solder mask works just fine. Here's a screenshot of the board in JLC's preview window. ![image.png](//image.easyeda.com/pullimage/7FkWNynuBHXMKlhBGQOsz6x5IHG67amzjCofFuom.png) Any ideas on why this is happening? Need to get these boards ordered asap, but I'm not sure how to respond to the JLC representative. The bottom layer is a copper plane with a couple of vias down to it. The JLC rep is giving me two options: "If it is normal, there will be two cases that we deal with the order: 1) to cover it all with tin 2) to cover it all with solder mask. No copper exposed is available. Then how to do with your order? Situation 1 or 2???"
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cjohnson 6 days ago
Here's the contents of the bottom solder mask file `G04 Layer: BottomSolderMaskLayer*` `G04 EasyEDA v6.1.41, Mon, 13 May 2019 23:03:07 GMT*` `G04 c99c01774ca941119f5b769db914f477,3b8503088de04cf78c269de7bbaf0aa3,10*` `G04 Gerber Generator version 0.2*` `G04 Scale: 100 percent, Rotated: No, Reflected: No *` `G04 Dimensions in inches *` `G04 leading zeros omitted , absolute positions ,2 integer and 4 decimal *` `%FSLAX24Y24*%` `%MOIN*%` `G90*` `G70D02*``%LPD*%` `M00*` `M02*`
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cjohnson 6 days ago
I think I have figured it out, but still am unsure how to respond to the JLC rep. If there is no exposed copper on the bottom (vias only, no through hole pads) it generates an empty solder mask gerber. This file isn't formatted or generated correctly though, because gerbview sees it as an invalid file.
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andyfierman 6 days ago
I recently created a simple test board with a layer with no copper and saw much the same thing and I think this may be the same issue that koosjr was having problems with a couple of weeks ago on his front panels. Have a look with gerbv? ( The FOSS Gerber viewer)
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cjohnson 6 days ago
@andyfierman Ah, that makes sense. So what I did to fix this was exposing the copper on the vias that I have on my board. It doesn't matter to me that the vias are covered in soldermask. This created a valid bottom solder mask file and now it looks correct in JLC's gerber viewer and in my local GerbView software. This is **definitely** a **bug** in the solder mask gerber file generator.
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andyfierman 6 days ago
I agree. I have just created a project with three simple PCBs: [https://easyeda.com/andyfierman/front-panel-with-silkscreen](https://easyeda.com/andyfierman/front-panel-with-silkscreen) 1. One has no copper at all. 2. One has a track on the bottom and a solid region on the top with no exposed pads or copper on either side. 3. The third has a track with 2 multi layer pads and a couple of solid regions, one with the region set to Expose Copper. There are some other features but they are irrelevant to this discussion. In (1) and (2) the top and bottom Soldermask files (.GTS and .GBS) are identical, suggesting that they are void. Only in (3) do they contain any data. This suggests that a non-void Soldermask file is only generated when there is an aperture in the soldermask due to some area of exposed copper. In other words if there is an area of copper with none of it exposed then a void soldermask file is generated which seem to be treated as NO SOLDERMASK REQUIRED.
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cjohnson 6 days ago
@andyfierman That observation correlates with what I have seen as well. If this is the case, then koosjr's EasyEDA project was valid, but the gerber generation in EasyEDA is what is causing the problem with JLCPCB orders lately.
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UserSupport 5 days ago
please send your PCB as EasyEDA file to [[email protected]](mailto:[email protected]) I need to check your file, and please let me know whehter if you want the bottom layer to create the solder mask layer when you placing an image? Are you want to make the logo copper exposing?
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UserSupport 5 days ago
@cjohnson For koosjr's issue, that is JLCPCB quality issue, not EasyEDA gerber generater bug. if your PCB doesn't have any object which will create the solder mask (like Pad, solder mask layer object), ther Gerber generater will not generate the solder mask graphics.
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cjohnson 5 days ago
@UserSupport I disagree.The gerber generation is not correct. If the back side of the board is just vias, without copper exposed, the bottom soldermask file is invalid. It can't be opened by any gerber viewer as myself and Andy have tested. This is how the board is **supposed** to look: ![image.png](//image.easyeda.com/pullimage/JjgqJQsHm9V1tLw2kkfuWk1AKyzY8DRJfBcRkP7k.png) The graphics you saw in my original post were in the silkscreen, not the solder mask. This is the exact same board, but with the copper on the vias exposed. It fixes the bottom soldermask generation problem. This is 100% a bug, because it caused the gerber generation from koosjr's board to not generate a valid solder mask file, since there was no apertures in the design itself.
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cjohnson 5 days ago
@UserSupport Also, would like to add that this is a recent bug, not something that's always been there. I recently ordered these exact boards and generated gerber files were correct. Looking at the differences between the same design I ordered recently and the current gerber file generation, it appears that EasyEDA stopped putting a small soldermask aperture in the center of via holes. ![image.png](//image.easyeda.com/pullimage/3w3jB1vC5tXORMiYUO8Y7ZSiKoXFWXINOto86C0U.png) This is how the bottom solder mask looked on the same design in that previous order.
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andyfierman 5 days ago
@cjohnson, Good spot!
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cjohnson 5 days ago
@andyfierman One thing this doesn't answer though, is that even if the gerber generation created the pinholes for the vias, it would still not work for a design with no vias/pads at all. It would generate a blank solder mask file and JLCPCB will treat that as "no solder mask."
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andyfierman 4 days ago
Agreed. I think the default should be that a soldermask layer is generated irrespective of whether; 1. there is copper on the layer **and**; 2. any part of the solder mask contains an aperture **or**;  3. unless the user states otherwise **or**; 4. the user states that the board is to be single sided. For cases (3) and (4) then the relevant soldermask file(s) MUST be deleted from the generated gerber file archive by the user before submitting the gerber file archive for quote and manufacture.
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cjohnson 4 days ago
@andyfierman Yep, the implementation portion of this is a little tricky.
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UserSupport 4 days ago
@cjohnson For the via, EasyEDA will not generate the solder mask for the via hole. then you will not see the solder mask data when the PCB only placed the vias. I agree this image, that control by Gerber viewer, the product should be like this too. ![图片.png](//image.easyeda.com/pullimage/Nt1Z0zgj6bGJsT06jAUVNMDNW4szZwiLNrnGVPpD.png) For solder mask layer: [https://en.wikipedia.org/wiki/Solder_mask](https://en.wikipedia.org/wiki/Solder_mask) it is a negative layer, which area you want to expose copper, you need to create a solder mask object for it.  you can refer at: [https://www.eurocircuits.com/pcb-design-guidelines/](https://www.eurocircuits.com/pcb-design-guidelines/) ![图片.png](//image.easyeda.com/pullimage/TDlxYllCyOdorPnkaRyW7XPohwdOhdHmyj6U8ITo.png)
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cjohnson 4 days ago
@UserSupport I understand fully that the file is a negative, that isn't the issue here. The issue is that when you generate a gerber file that doesn't contain any apertures in the soldermask file, JLCPCB's gerber viewer doesn't show it having a soldermask at all.
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UserSupport 3 days ago
When I generate below PCB gerber file at v6.1.41, v.5.9.42, v5.8.20, v5.7.26, v5.6.15, the top or bottom solder mask gerber file contents are the same,  it should not a recenlty bug, EasyEDA generate it all the time, but we will figure it out whether if correct or incorrect. thanks ![图片.png](//image.easyeda.com/pullimage/o0jjRFfN4GsFnQy0NetubRjzgS109TVg0mfA1uaU.png) ![图片.png](//image.easyeda.com/pullimage/SMBNCjHfGwgzyD2CDrcWhPjLpkLgkAf43xqNqGl3.png)
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