Transient solution failed - Last Node Voltages ------------------ Node Last Voltage Previous Iter ---- ------------ ------------- r12_2 -7.62178e-72 -5.39312e-81 r13_1 -7.62178e-72 3.22634e-96 volprobe -7.62178e-72 1.49814e-95 xu8.xrs.inunity1 3.85363e-84 0 r12_1 4.37377e-71 1.98574e-81 xu8.xmr.inunity1 2.56797e-71 0 xu8.vddok 0 0 xu8_9 3.42556e-72 4.27129e-82 xu8.clkschmitt 0 0 xu8.xrextd1.pullupswa1 1 0 * xu8.xrextd1.pulldownswa1 0 0 xu8.xrextd1.multswhi1 0 0 xu8.xrextd1.multswlo1 0 0 r14_1 -7.62178e-72 2.79878e-88 xu8.xcextd1.pullupswa1 0 0 xu8.xcextd1.pulldownswa1 1 0 * xu8.xcextd1.multswhi1 0 0 xu8.xcextd1.multswlo1 0 0 xu8.xqpd3.pullupswa1 0 0 xu8.xqpd3.pulldownswa1 1 0 * xu8.xqpd3.multswhi1 0 0 xu8.xqpd3.multswlo1 0 0 xu8_7 -7.62178e-72 1.94529e-91 xu8.xqpd4.pullupswa1 0 0

@Khadeeja xu8.xqpd4.pulldownswa1 1 0 * xu8.xqpd4.multswhi1 0 0 xu8.xqpd4.multswlo1 0 0 xu8_5 -7.82046e-72 -1.33147e-77 xu8.xqpd5.pullupswa1 0 0 xu8.xqpd5.pulldownswa1 1 0 * xu8.xqpd5.multswhi1 0 0 xu8.xqpd5.multswlo1 0 0 xu8_4 -7.67261e-72 -2.85903e-78 xu8.xqpd6.pullupswa1 0 0 xu8.xqpd6.pulldownswa1 1 0 * xu8.xqpd6.multswhi1 0 0 xu8.xqpd6.multswlo1 0 0 xu8_6 3.42556e-72 4.27129e-82 xu8.xqpd7.pullupswa1 0 0 xu8.xqpd7.pulldownswa1 1 0 * xu8.xqpd7.multswhi1 0 0 xu8.xqpd7.multswlo1 0 0 xu8_14 3.42556e-72 4.27129e-82 xu8.xqpd8.pullupswa1 0 0 xu8.xqpd8.pulldownswa1 1 0 * xu8.xqpd8.multswhi1 0 0 xu8.xqpd8.multswlo1 0 0 xu8_13 3.42556e-72 4.27129e-82 xu8.xqpd9.pullupswa1 0 0 xu8.xqpd9.pulldownswa1 1 0 * xu8.xqpd9.multswhi1 0 0 xu8.xqpd9.multswlo1 0 0 xu8_15 3.42556e-72 4.27129e-82 xu8.xqpd11.pullupswa1 0 0 xu8.xqpd11.pulldownswa1 1 0 * xu8.xqpd11.multswhi1 0 0 xu8.xqpd11.multswlo1 0 0 xu8_1 3.42556e-72 4.27129e-82 xu8.xqpd12.pullupswa1 0 0 xu8.xqpd12.pulldownswa1 1 0 * xu8.xqpd12.multswhi1 0 0 xu8.xqpd12.multswlo1 0 0 xu8_2 3.42556e-72 4.27129e-82 xu8.xqpd13.pullupswa1 0 0 xu8.xqpd13.pulldownswa1 1 0 * xu8.xqpd13.multswhi1 0 0 xu8.xqpd13.multswlo1 0 0 xu8_3 3.42556e-72 4.27129e-82 r14_2 -7.62178e-72 0 sw_sw1 0 0 off 0 0 r9_1 -7.82046e-72 0 r8_1 -7.62178e-72 0 r10_1 -7.67261e-72 0 c1_2 0 0 led1#branch -7.71451e-84 0 led2#branch 6.2064e-76 0 led3#branch 9.07659e-77 0 led7#branch -1.97937e-76 0 led8#branch 1.8113e-85 0 led9#branch -7.71451e-84 0 v1#branch 6.28211e-80 0

@Khadeeja a.xu8.a.xmr.ainunityscale1#branch_2_0 0 0 a.xu8.a.xrs.ainunityscale1#branch_2_0 0 0 a.xu8.aclkschmitt1#branch_1_0 0 0 a.xu8.ahyst1#branch_1_0 0 0 a.xu8.a.xqpd13.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd13.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd12.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd12.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd11.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd11.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd9.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd9.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd8.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd8.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd7.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd7.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd6.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd6.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd5.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd5.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd4.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd4.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd3.amultlo1#branch_1_0 0 0 a.xu8.a.xqpd3.amulthi1#branch_1_0 0 0 a.xu8.a.xcextd1.amultlo1#branch_1_0 0 0 a.xu8.a.xcextd1.amulthi1#branch_1_0 0 0 a.xu8.a.xrextd1.amultlo1#branch_1_0 0 0 a.xu8.a.xrextd1.amulthi1#branch_1_0 0 0 a.xu8.a.xqpd13.adac2#branch_1_0 0 1 * a.xu8.a.xqpd13.adac1#branch_1_0 0 0 a.xu8.a.xqpd12.adac2#branch_1_0 0 1 * a.xu8.a.xqpd12.adac1#branch_1_0 0 0 a.xu8.a.xqpd11.adac2#branch_1_0 0 1 * a.xu8.a.xqpd11.adac1#branch_1_0 0 0 a.xu8.a.xqpd9.adac2#branch_1_0 0 1 * a.xu8.a.xqpd9.adac1#branch_1_0 0 0 a.xu8.a.xqpd8.adac2#branch_1_0 0 1 * a.xu8.a.xqpd8.adac1#branch_1_0 0 0 a.xu8.a.xqpd7.adac2#branch_1_0 0 1 * a.xu8.a.xqpd7.adac1#branch_1_0 0 0 a.xu8.a.xqpd6.adac2#branch_1_0 0 1 * a.xu8.a.xqpd6.adac1#branch_1_0 0 0 a.xu8.a.xqpd5.adac2#branch_1_0 0 1 * a.xu8.a.xqpd5.adac1#branch_1_0 0 0 a.xu8.a.xqpd4.adac2#branch_1_0 0 1 * a.xu8.a.xqpd4.adac1#branch_1_0 0 0 a.xu8.a.xqpd3.adac2#branch_1_0 0 1 * a.xu8.a.xqpd3.adac1#branch_1_0 0 0 a.xu8.a.xcextd1.adac2#branch_1_0 0 1 * a.xu8.a.xcextd1.adac1#branch_1_0 0 0 a.xu8.a.xrextd1.adac2#branch_1_0 0 0 a.xu8.a.xrextd1.adac1#branch_1_0 0 1 * doAnalyses: iteration limit reached tran simulation(s) aborted Error(parse.c--checkvalid): volprobe: no such vector. ngspice-26 done My Circuit (https://easyeda.com/Khadeeja/New_Project-edf6f68f3074422a926d6edace3872b1) Please help quickly. I seriously do not know what to do

@Khadeeja, Welcome to EasyEDA. Please do not post simulation results. Amino to your simulation is all that is needed. To understand how to use EasyEDA for simulation, please see Section 3 in: https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f

@Khadeeja, Sorry, Autocorrupt strikes again. `Amino to your simulation is all that is needed.` should have said: `A link to your simulation is all that is needed.` There are three basic reasons that your simulation will not run. 1. you have used non-simulation parts in your simulation schematic (the LEDs, the two diodes, the switch); 2. you have connected two capacitors in series which will cause a simulation to fail anyway (see the simulation eBook about DC paths to ground); 3. you also have not used any startup conditions for the power supply which the RC oscillator in the 74HC4060 will require. This is also described in the simulation eBook. Although nothing to do with simulation it is just bad practice to try to connect LEDs in parallel with only a single current limiting resistor. Please see: https://easyeda.com/andyfierman/LEDs_must_have_series_resistors-OoGYgCK2k

If you want to post simulation results, the only parts that are useful for diagnostics on the forum are the first few lines: Circuit: gooduntitled Error on line 4 : sw1 r13_1 r14_2 sw_sw1 off Unable to find definition of model - default assumed errors/warnings in your design, please fix them if you need errors/warnings in your design, please fix them if you need. Reducing trtol to 1 for xspice 'A' devices Doing analysis at TEMP = 27.000000 and TNOM = 27.000000 Warning: singular matrix: check nodes led1#branch and led1#branch and the last few lines: doAnalyses: iteration limit reached tran simulation(s) aborted Error(parse.c--checkvalid): volprobe: no such vector. ngspice-26 done but in general rather than post any of that, to diagnose what is wrong with a simulation, it is neccessary but sufficient just to give us access to the project via the public (or provately shared) link such as the one you posted.