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Hi, Stupid guestion. :)
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piirja 9 years ago
Can you explain me via,hole / pad differences, are both copper plated and couple usage examples. Thanks!
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dillon 9 years ago
Hi, If you are a newbie, this is a good question, you must understand them before you create a project. `VIA` which lets you swich a TRACK from TOP layer to bottom layer. in the bellow image, if you don't add a via, there are two top layer tracks, will short . `PAD` the `PIN` of Package , where you solder your IC. `HOLE`, you mount your PCB. You can read our https://easyeda.com/Doc/Tutorial/ and google some things. If you have any questions, please let me know. ![Alt text](/edaImg/cms/1420803446_hole-pad.png)
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dillon 9 years ago
Try to play this project https://easyeda.com/project_view_First-project_cMGzRL3lf.htm
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piirja 9 years ago
i have this kind information, The via is a NPTH hole (Non Plating Through Hole) without copper, the pad is a PTH hole (Plating Through Hole) with copper. How then you can use via in switching, if the are connected? small wire and tin..? No.. i have in my board only pad holes, and every trace go with them, just that wondering, are they always through hole copper plated or are this programm thing or board manufacturer thing? Greetings, Jarno Piironen I use Seedstudio service.
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andyfierman 9 years ago
piirja, Here are some notes to help you better understand Pads and Vias: **Pads:** >Primarily used for through hole component pins, through hole test points and mechanical mounting holes; >Can be set to have hole size = 0 to create pads for surface mount component pins and single sided test pads; >Can be any size. >Can be placed anywhere. >Can have pad on all layers or on top layer or on bottom layer only (becomes a plated-though hole if pads on all layers so a track connected to a pad on one copper layer is connected to a track to a pad in the same plated-through hole on any other copper layer); >Can be set to have hole size = pad size to create an unplated hole with no pad annulus (subject to internal bug report because currently cannot do this); >Does not have to have tracks connected to it. Please also see: <https://easyeda.com/Doc/Tutorial/PCBLib.htm#Pad> **Vias:** >Primarily used to swap tracks from one copper layer to another and to join tracks on different PCB copper layers on surface mount PCBs and where there is no through hole component pin that can be used for these purposes; >Usually smaller than Pads; >Can be placed anywhere. >Always have copper annulus on all layers (automatically depends on number of PCB copper layers defined by user); >Has copper plating along the length of the hole (so a via copper annulus on any layer is always connected to a copper annulus on the same via on all other copper layers); >Does not have to have tracks connected to it (but is of little practical use without them!). >**Beware: Vias can be set to have hole size = 0 but it is recommended to use a Pad for this because a zero hole diameter via is not a via at all: it is a pad with no hole!** >Note via hole diameter in DRC: >><https://easyeda.com/Doc/Tutorial/PCB.htm#DRC(DesignRuleCheck)> >**Beware: do not try to set via hole size = via copper annulus size because a via with no copper round it is not a via at all: it is an unplated hole! Use a pad instead.**
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andyfierman 9 years ago
**Oops!** My bad. It is not a bug that it is not possible to set `hole size = pad size`. A dedicated Hole Tool to add unplated holes to the PCB will be introduced soon. :)
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dillon 9 years ago
> are they always through hole copper plated If you set `PAD` layer *NOT* to all(TOP or Bottom), this is no through hole copper plate. You can download the Gerber file to check your guess. Dillon
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piirja 9 years ago
Thank you both! Really lighten answers.
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knauf1919 7 years ago
Hi, i have a little problem... I set PAD to Bottom but i don't can set the hole diameter. If i set ALL (TOP&BOTTOM) i can set the diameter.
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knauf1919 7 years ago
Problem has been solved. :)
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