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Hidden Nets in PCBLib Footprints
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ABouman 4 years ago
Hey, Project: PCB Coil User: ABouman First post here. I am getting either program generated nets or undefined nets in my PCBLib footprint traces. When I select the traces in the PCBLib editor I can't specify a net ID either. Is there anything I can do to get rid of the DRC errors? ![image.png](//image.easyeda.com/pullimage/1jbRQTHdFAfvh4ElkD1zS9sdgAvOCb9OT67bkCZc.png)![image.png](//image.easyeda.com/pullimage/egRVQHpYDSmXmqji1MlrvSrr4lY4yFDqEsSmzPoK.png) Thanks
Comments
andyfierman 4 years ago
The problem is that the coil is one single trace so you cannot connect it to adifferent net at each end because that will generate a DRC error. It is a short circuit across the capacitor (hence the ratline). This problem is discussed here: [https://easyeda.com/forum/topic/What-s-the-best-way-to-create-a-NFC-PCB-trace-antenna-component-68c5ec1751b4483dbde105d309274754](https://easyeda.com/forum/topic/What-s-the-best-way-to-create-a-NFC-PCB-trace-antenna-component-68c5ec1751b4483dbde105d309274754) [https://easyeda.com/forum/topic/PCB-trace-antennas-seem-impossible-to-use-d4f1b45fe1e04a4187603026826c084b](https://easyeda.com/forum/topic/PCB-trace-antennas-seem-impossible-to-use-d4f1b45fe1e04a4187603026826c084b) [https://easyeda.com/andyfierman/how-to-make-a-connectable-antenna](https://easyeda.com/andyfierman/how-to-make-a-connectable-antenna) [https://easyeda.com/forum/topic/How-to-design-a-PCB-Lib-for-a-PCB-Antenna-efa50ba1cdd9433c958ceedbad520398](https://easyeda.com/forum/topic/How-to-design-a-PCB-Lib-for-a-PCB-Antenna-efa50ba1cdd9433c958ceedbad520398)
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UserSupport 4 years ago
Hi Place this footprint at PCB, ungroup it, ![图片.png](//image.easyeda.com/pullimage/aQiQRINPJBfSKfnAWxHqIP8obI3oi1teRGBeH8pa.png) modify the track or Arc net and then group it as a footprint again. and you can copy and paste the ungroud object to a new PCBlib.
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ABouman 4 years ago
Thank you both for the help and information!
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