**BUG** Concise problem statement: When placing two vias (or PTH, or Holes) in violation of the hole-to-hole the Design Rule a warning or X never appears. Steps to reproduce bug: 1. Create a new schematic or existing one 2. Place a via (or PTH or Hole) 3. Place a second via (or PTH or Hole) so the holes overlap Results: The designer allows you to place the second hole without warning that it is in violation of the hole-to-hole distance design rule Expected results: The hole-to-hole design rule represents the minimum distance between edges of 2 adjacent holes, and the editor warns when to vias, holes, or PTHs are placed in violation of this rule. Browser: Chrome