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How to connect pad to ground plane through track to via?
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srobertjames 10 months ago
I'm new to EasyEDA, and have successfully captured my schematic, generated a 2 layer PCB, placed the components, added tracks on the top layer, and added a ground plane (copper region) to the bottom layer. My goal now is to connect the components' pads to the ground plane, by adding vias and then adding tracks from the appropriate pads to the vias.  I'm getting errors when I do this. I reduced my circuit down to a minimal example which shows the problem, available at [https://oshwlab.com/srobertjames/minimal-example-led](https://oshwlab.com/srobertjames/minimal-example-led) .  There are two pads which need to go to GND.  I've added a via next to each one.  EasyEDA does not let me connect the pads to the vias: when I try to draw the track, it will stop outside the via.  How do I connect the via to the pad? <br> <br> Also, in some cases, a yellow X appears on or near the via.  I do not know what that signifies.  Likewise, the 3D view does not seem to show the ground plane (copper region) on the bottom of the board. <br> <br> <br> <br>
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andyfierman 10 months ago
[https://docs.easyeda.com/en/PCB/Route/index.html#Some-Tips-about-Track](https://docs.easyeda.com/en/PCB/Route/index.html#Some-Tips-about-Track)<br> <br> For them to connect in the PCB, Tracks, Pads and Vias must have the same net name.
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srobertjames 10 months ago
Thanks! This solved it! For my future understanding: Why aren't the nets set up this way from the schematic? If my schematic shows all these going to GND, which it does, wy aren't the nets in the PCB designer generated accordingly?
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andyfierman 10 months ago
The tracks that you create from the ratlines and the pads that are part of the footprints are set up to inherit the netnames from the schematic but since vias are not indicated in the schematic and are only added in the PCB Editor directly, EasyEDA has no way of knowing what net name should be assigned to  any particular new via. Giving a via a default net name would inevitably lead to accidental shorts so they are left unnamed. If you read the link above you will see that there is a simple way to place vias so that EasyEDA does know what net they are supposed to be assigned to: ![image.png](//image.easyeda.com/pullimage/zLyn0vjXemoblEwogfkNgIu6UZIPUndcvfkm9cTO.png)
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andyfierman 10 months ago
I think @haidy_easyeda meant to post this reply to your topic instead of the one it actually is posted into: "Hello, if you want to place the vias,Please find the photos.Hope my explanation is able to assist you. Please feel free to let us know if you have any further questions. [‍‌‌‌‬‍⁣⁣‍‬‬‍⁤⁡‍⁣⁡⁤‬⁣‬⁣⁤⁢⁣⁢⁡⁢⁢⁢⁡⁡⁤⁡‍⁢How to place the vias? - 飞书云文档 (feishu.cn)](https://lceda001.feishu.cn/docx/BzAmdVogNoOFRjxCw0uciGoBnHZ)"
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