EasyEDA does not directly support the creation of blind vias but if you contact **Support** directly they may be able to help you. https://easyeda.com/page/contact Is there any particular reason that you need to use blind vias on a 4 layer PCB? Do you have a board area constraint?

4 layer PCB is solely my preference. I do not have any tight board area constraint. I can use through vias instead, but they provide no clearance - the inner planes are simply two large copper areas. Perhaps using holes - that is how they are called in the editor - will work, since they provide clearance. It would be much nicer to have blind and buried vias though.

Sorry, don't understand: `I can use through vias instead, but they provide no clearance` Clearance from what to where? Can you give an example of what you're looking to achieve?

The inner planes are entirely filled with copper areas - one is connected to ground, the other one is connected to 3.3V. I want to short certain traces from outer planes to them. However, doing so using a via connects it to both inner planes at once. Clearance is a property of copper areas - it is the distance the copper area is separated with from traces inside and near it. You can put a trace inside a copper area and the editor will create the clearance around it automatically. Otherwise the trace would be shorted to the copper area. I need clearance between the via and the plane it isn't supposed to be shorted to. Otherwise I'll have the power plane shorted to ground plane. However, vias in the editor provide no clearance - only pads do (I have mistakenly called them "holes" in my previous post).

Without sight of your project it is not possible to say why you appear to have a problem but your vias should connect into the planes as in: https://easyeda.com/andyfierman/Simple_schematic_onto_4_layer_PCB-bd71060a45c845af8a41099ca145b24d Check the Gerbers by pressing the `Fabrication Output` button and then selecting the `Gerber Viewer` and selecting ` All Layers` and looking at G1 and G2 layer files. Please see: https://easyeda.com/forum/topic/The_best_way_to_design_a_PCB_in_EasyEDA-ThR3pwqIC and: https://easyeda.com/Doc/Tutorial/ as this may help in identifying why your vias do not appear to connect into the planes.

Thank you for help. It appears that I have forgot to update the copper areas or confused myself with similar color for inner layer 1 and top layer. The vias indeed have clearance with copper areas. The problem is solved.