I just made some changes to a PCB and now it shows some DRC clearance errors and I can't resolve them. :(
What might be wrong? I removed tracks, change net names...weird. I'm pretty convinced that the clearances are ok...
![Clearances 2020-01-30_19-04-08.png](//image.easyeda.com/pullimage/4kI57lDbSpop9Pc5Rq9e56phVw1w1QN3sZCZ5zUr.png)
It's in the file "PCB Xistera V5"
[https://easyeda.com/editor#id=327ef667a26e41e781a7d215b0545d7d](https://easyeda.com/editor#id=327ef667a26e41e781a7d215b0545d7d)
Chrome
79.0.3945.130
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10_14_6
EasyEDA
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