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Incomplete Connections! Although All of the Connections Are Complete!
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Ozantg 4 years ago
Dear All, I am trying to design a custom PCB. I have complete and check **all of the connections** and they are **okay**! But \*\*EasyEDA \*\*warns me that none of the \*\*connections \*\*is completed \*\*which is impossible \*\*otherwise I wouldn't have done anything\. \*\*Ratlines are also disappearing when I made a connection means; EasyEDA verifies the connections\! \*\* **But why doesn't the program see none of the connections made and warns all of them are incomplete? That is so annoying!** Regards
Comments
deskpro256 4 years ago
Hello! Can we see your project to help you? Did you route by hand or use the autorouter? Have you made a schematic first and then the PCB? Maybe the error is caused by having some pins unused for some part and them not having the NC cross on the pin? ![err.png](//image.easyeda.com/pullimage/sOVyvZW8etQOS7pnsASKXI9vfjMYeQsbRTTvtbK4.png) ![nc.png](//image.easyeda.com/pullimage/TXMt465gOWLg2FvZMmFTJtEYyJfaYArsP8xXmBlU.png) It likes to complain about unfinished nets without the NC flag. As I said, seeing your project and the error itself would be helpful to us and you.
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Ozantg 4 years ago
Hi, Thank you for your immediate response! **EasyEDA **complaints about almost all of the **Nets **in both the **Schematic **and the **PCB**. ![Schematic_MCU Stage 2_MCU Stage Large Circuit_20200305134857.png](//image.easyeda.com/pullimage/yXgdl5fW4AJKfsV9TVSAkP08IsmyeFEeIf9fhcpP.png) Also here is the **EasyEDA Schematic Page:** **![Capture.jpg](//image.easyeda.com/pullimage/57NFIfwVobiMfpLX87nkro5cdK4Kh64snEBG64hN.jpeg)** **I have corrected some of them but remaining seems impossible since it complaints about even the correct net connections weirdly.** **Pins P0.09, P0.10 and P0.11 are GPIO pins and on PCB they will be conected to Pads directly. So I have added only Net names on them is that right way of doing that?** Regards
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Ozantg 4 years ago
**PS: **I have another version of this circuit was ready, and I just copied the entire schematic and made small improvements on that copy. **Might the problem be caused by that?** **Would I have had to start from scratch? Could copying entire schematic to another schematic file create such kind of problem?** Regards
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Ozantg 4 years ago
Hi, I am sorry for taking your time. Circuit is large, I have missed just a single tiny VDD connection! That was the problem. Now everything works! Thank you for your time! Regards
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andyfierman 4 years ago
@Ozantg, If you check the Design Manager it will tell you where all the connections are and you can then check them pin by pin: ![image.png](//image.easyeda.com/pullimage/ZgZRfaqes8Un5jdY2AqN2PfYQGjSr1LIW1jI0LpT.png)
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Anthony Stuart 3 years ago
If anyone else ends up here looking for a way to find incomplete connections on a complex net, a straightforward option that worked for me is to use the "Layers and Objects" panel to hide all layers except ratlines. Still not seeing anything? Make sure the checkbox for the net is checked under the Nets item in the Design Manager.
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andyfierman 3 years ago
A slight refinement: In the **Layers and Objects panel**, select the **Ratline Laye**r and turn off the visibility of all other layers. * Then repeatedly click on the Ratline Layer Visibility icon (the little eye) to toggle the visibility of the Ratlines, making them turn on and off and so make them easier to see: ![image.png](//image.easyeda.com/pullimage/rjPM2lJTCrQMMxWWU7efRf94ea4qd6EtF6twseBE.png)
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plawren1 2 years ago
@andyfierman This helped me. After pulling out half my hair I toggled this guy and my error went away. Grrrrrr. Thanks!
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