Copper areas are used for a number of reasons depending on how many layers there are in the PCB and where they are placed. By far the most common usage is to reduce the impedance of the supply and ground return paths. Basically, used like this, copper areas act like wide tracks so reducing not just the DC resistance but also the inductance and so AC impedance of the paths to and from the supply. Just using copper areas like this is only half the story though: you need to place decoupling capacitors across the rails at the input to the PCB and as close as possible across the device supply pins. See: [https://easyeda\.com/andyfierman/Power\_supply\_decoupling\_and\_why\_it\_matters\_\-451e18a0d36b4f208394b2a2ff7642c9](https://easyeda.com/andyfierman/Power_supply_decoupling_and_why_it_matters_-451e18a0d36b4f208394b2a2ff7642c9)

Assuming you are using CMOS digital devices then absolutely yes.   In CMOS half the transistors (all the NMOS ones) are referenced to GND and so need a clean ground supply, but all the PMOS ones are referenced to VDD and couldn't care less what's on the ground supply.  In fact PMOS transistors are more fussy than NMOS so if you ever have noise issues it's best to look at VDD rather than GND first.  In view of this I always mount my decoupling capacitors so when it's impossible to have short tracks from both sides of the capacitor to the device, I always place the positive capacitor pin closest to the device.

@MikeDB, "...when it's impossible to have short tracks from both sides of the capacitor to the device, I always place the positive capacitor pin closest to the device." This is quite a subtle point. For clarity's sake for novices (and me), I think you need to explain a bit more about why this works. Could you post a diagram of some sort to illustrate this? It's not obvious how doing this changes the effect of the decoupling capacitor because it depends on how the supply connections are laid out. For instance, imagine a DIP 14 package with GND on pin 7 and VDD on pin 14. If the decoupling cap were tracked directly to the GND and VDD pins but the track from one side of the cap had to be longer than to the other then it would make no difference if the cap were placed close to the GND or the VDD pin or midway between. It is only when the contributions of the track impedances due to the relative position of the device and cap connections to GND and VDD are considered that any advantage becomes clearer.

 You sort of answered it yourself but here's the diagram.   A CMOS IC effectively almost shorts R3 across the VDD and GND pins for a few picoseconds.  In this time only the closest decoupling capacitor is relevant so we can ignore the power supply and other decouplers. The capacitor C1 has an impedance (combination of resistance and inductance) in the tracks to the VDD and GND pins.  Obviously we try to make these low as possible but they are always there, including of course the internal wiring of the IC which you cannot alter. Now if R1=R2 which is the best way to lay the PCB, then VDD will sink by the same amount as GND rises.   Provided this doesn't exceed the noise margin of the IC then the capacitance on the gates of each transistor will keep the transistors in their correct state and things like SRAMs (always the most critical part of any IC) won't lose their state. But if we cannot lay out the capacitor such that R1=R2, which is often the case with two layer boards or where we don't want to put components on the reverse side of the PCB, then because PMOS transistors, which use VDD as their reference, have slightly less noise immunity than NMOS ones, which use GND as their reference, due to their lower gain and method of operation, I prefer to make R1 smaller than R2 by placing the positive pin of the capacitor closer to the IC VDD pin than the negative capacitor pin is to the IC GND pin. Of course some IC manufacturers, notably STMicroelectronics, ignore this by showing the decoupling capacitor placed on the back of the PCB.  And in recent years some have started putting the VDD and GND pins at one end of the package which helps enormously. Hopefully this clarifies things.