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Is charging time not modeled in capacitors?
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ALX 8 years ago
I am trying to create a delay in a DC signal propagation path in my simulated circuit by placing a capacitor. The capacitor does nothing to slow the charge at the capacitors connected node. Are the capacitors modeled as an ideal open circuit with zero rise time? Alex
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andyfierman 8 years ago
Hi ALX, Welcome to EasyEDA. There are a number of things that you may be doing to give you the results you are alluding to but without a schematic and some simulation directives to see how you are running your sim, it is difficult to give relevant advice. Could you make an example of what you are trying to do public? In the meanwhile, there are some things to note about spice. 1. Voltage sources are ideal. They have zero source impedance and no current limit; 2. A DC source applied to a circuit at time zero (start of a transient analysis) is considered to have been applied to that circuit for all time < 0; 3. Basic capacitors have zero series resistance and inductance (i.e. ESR and ESL = 0). They are also considered to have an infinite impedance at DC; 4. Switches have a finite off-resistance; 5. Remember that in spice, the `m` suffix means `milli`, i.e. 1e-3 whereas `Meg` means Mega, i.e. 1e6. If you want a 1MegOhm resistor then you must write it as 1Meg and not 1M (spice is also case insensitive). I suspect point (5) may be the culprit. Please have a look at the EasyEDA Simulation eBook for more information: https://easyeda.com/Doc/Simulation-eBook/Introduction-to-using-a-simulator.htm#Avoidingcommonmistakes :)
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andyfierman 8 years ago
These examples may help illustrate some of the possible pitfalls: https://easyeda.com/example/Use_and_abuse_of_voltage_sources_in_ngspice_01-db5nhzR93 https://easyeda.com/example/Use_and_abuse_of_current_sources_in_ngspice_01-Rb9vtOM8u https://easyeda.com/example/Suffixes_in_ngspice-zxrJ1jASM
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