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Isolation Barrier
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ismailcanolmez 3 months ago
``` I am designing a board with galvanic isolation for my high voltage to low voltage voltage measurement project. I want to put an isolation barrier like this ([]) to prevent arc bounce, but I couldn't find how to do it. Thanks for your help. ``` ``` ``` ![Topluluk Tarafından Doğrulandı simgesi](data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAABQAAAAUCAQAAAAngNWGAAABDUlEQVR4AYXRgUZDYRjH4TegFTKgpEqiFJgoWAoMEQGBgBboChaaAKxLKAhAhQqAdAmpBIQolkCFqp2nITvNKXuA7+/Hhzey5OWjE4Nq3rzY1f9/NGHPB549492+8Ww060iCS2XdctZdI3GsECmb+HJoIX6x6EgDm+lURTH+YB7V9nAqE5WNme4YKuOiY6iMe6PaQxUUIuTbswgFVNJwA8sO3Bn6yR6bWZMSNtJwDtuWfHpQxaPx9C9zadil7jrCigbq6UXceNIVKTWUIqypm2ytJdTiNyNeXclF6GttOVfeDEc7qzjR23r3OMFqZKng1kw0mXGLrfibHTScOZWgGv9TdC6ROFeMTgwYiIxvJzMRWQbeGZUAAAAASUVORK5CYII=) <span class="colour" style="color:rgb(154, 160, 166)"><span class="tw-menu-btn-image z1asCe wm4nBd"></span></span><span class="colour" style="color:rgb(189, 193, 198)"><span class="size"></span></span><span class="colour" style="color:rgb(154, 160, 166)"><span class="tw-menu-btn-image z1asCe JKu1je" title="Dinle"></span></span>
andyfierman 3 months ago
Let's call the two sides LV and HV. The signal tracks on each side will have different netnames because the LV and HV sides are obviously not connected to each other. Similarly and ground and power will have  planes have different netnames because they are also not connected to each other. Once you understand that then it is easy to create the schematic and then, after converting it to PCB, to route and lay out the tracks to give you the gap between the LV and HV sides. You can create any planes (Copper Areas) required by assigning the appropriate netnames to them and drawing their outlines as desired.
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