The behaviour you have described is due to a common misunderstanding by newcomers about the differences between simulations and real life. DC voltage (and current) sources in spice are assumed to have asserted their voltage (or current ) for all time prior to the start of the simulation (i.e. time t<0). So in your circuit, the voltage V(out) across the capacitor, C1, has already charged up to 5V at the start of the simulation at time t=0. To get yourself up to speed with and get the best out of simulation in EasyEDA, please ensure that you have read and played with the examples in the Simulation Tutorial, (3), in Welcome to EasyEDA, (2), in: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a)<br> <br> BTW: the link you have posted is not the right one therefore, please also read: [https://easyeda.com/forum/topic/How-to-make-a-Project-public-and-share-the-links-to-it-9f006513b84b412580910905b0281d20](https://easyeda.com/forum/topic/How-to-make-a-Project-public-and-share-the-links-to-it-9f006513b84b412580910905b0281d20)<br> <br> This is the link to your project on OSHWLab: [https://oshwlab.com/cider101/lowpass](https://oshwlab.com/cider101/lowpass)

A simple "fix" for your particular simulation is to use a voltage source configured as a PULSE source...

@andyfierman thx a lot....though I did read (some) the simulation tutorial, I looks like I missed the important parts ;) thx again!