This is not a bug. The two nets are joined but they can only have one net name (IIRC, it is the first one placed into the schematic). Check the Nets and the warning in the Schematic Design Manager:  Check the warning when you do Convert to PCB... or Update PCB... :  Then see PCB Design Manager:  <br> <br> Please study these two topics and the associated project: [https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6](https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6) [https://easyeda.com/forum/topic/MERGE-POINT-Merging-a-Digital-and-Analog-ground-together-97285eff92e745b4b5d5dff8bf21369b](https://easyeda.com/forum/topic/MERGE-POINT-Merging-a-Digital-and-Analog-ground-together-97285eff92e745b4b5d5dff8bf21369b) [https://easyeda.com/andyfierman/shorting-link](https://easyeda.com/andyfierman/shorting-link)<br> <br> Please also see: [https://docs.easyeda.com/en/Simulation/Chapter4-Introduction-to-using-a-simulator/index.html#Components-are-connected-by-netnames](https://docs.easyeda.com/en/Simulation/Chapter4-Introduction-to-using-a-simulator/index.html#Components-are-connected-by-netnames)<br> <br> and: [https://easyeda.com/andyfierman/joining-nodes-to-make-nets](https://easyeda.com/andyfierman/joining-nodes-to-make-nets)

See also: [https://easyeda.com/forum/topic/Net-tie-a-copper-only-component-with-2-pads-to-split-nets-without-DRC-errors-and-multiple-netname-warnings-b6a099bf01bb4055b821ab398ee37b60](https://easyeda.com/forum/topic/Net-tie-a-copper-only-component-with-2-pads-to-split-nets-without-DRC-errors-and-multiple-netname-warnings-b6a099bf01bb4055b821ab398ee37b60)

when you add two net in one wire, when convert to pcb will only use one of them as net name