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Not able to route tracks to MAX77757JEFG420+ IC footprint
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soorajiyer 1 year ago
I am designing a circuit using USB C and MAX77757JEFG420+ to charge a battery. I am not able to route tracks to this MAX IC. ![Screenshot 2023-11-09 165354.png](//image.easyeda.com/pullimage/5i49o5TQzBGXY6b3nuDZHc4tVPWfquoDAXV88lsd.png) ![FOOTPRINT OF MAX IC](//image.easyeda.com/pullimage/DbWuHQFk912NV0B1tRSPT3YUqDhLBEPXr5dkWAXs.png)![DRC](//image.easyeda.com/pullimage/nV46SuTBxTFtaKFohsLGmEXBDuXiSAd1R0XzZzO7.png)
Comments
haidy_easyeda 1 year ago
Hello, Thanks for contacting us and sorry for keeping you waiting. In order to help you better, Could you please send me the project files?![easyeda导出文件4d28b9a56037e46406e5af43917edfc.png](//image.easyeda.com/pullimage/A2ALZ4fThgDhSFwqHhyCwhMEOzCod3d0qa04b6uL.png)This is my email address:<u>[haidy@easyeda.com](mailto:haidy@easyeda.com)</u> I look forward to hearing from you!
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UserSupport 1 year ago
Hi you can change the DRC clearance smaller
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andyfierman 1 year ago
I suspect that the irregularly shaped pads in these Footprints have been made using elements other than Pads (such as Solid Regions). This topic may help to explain the DRC errors that you are seeing: [https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6](https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6)
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soorajiyer 1 year ago
Yes, you were right. I figured this out. The pads were made using solid region and this is the reason why, I was not able to draw tracks. I converted the solid region to pads and now it worked. Anyway thanks a lot for your reply.
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