Hi,
When it is needed to place wires to an off board transistor, how do we draw the schematic that wouldn't generate net error ?
I'm attaching a screen shot for clarity. In the image the E2 is a going to a device and all others are coming from different devices to the board, there are errors because those are open points. How can we avoid and properly design a board ?
Thanks in advance.
Regards.
Anoop.
PS : I'm not able to attach image, neither jpg, jpeg, png etc.
\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-O E2
\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-O E3
\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-O E4
\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-O E5
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