You need to use EasyEDA editor to create some projects before publishing
PCB high current thermal design
2918 17
Ibrahim Qasim 4 years ago
Hello, I was looking to implement thermal vias to reduce heat on my LiPo battery charging PCB. It should allow for up to 2.5 A and I've already ordered previous versions of the board that would cause my main battery charging IC to go into thermal shutdown. Is it possible to take a look at my PCB layout/design to make sure my traces are wide enough and vias are placed properly to ventilate heat?? Here is the link to my project page: [https://easyeda.com/iqasi096/bq24650evm-board_copy](https://easyeda.com/iqasi096/bq24650evm-board_copy) Thank you!
Comments
cjohnson 4 years ago
Hi, I'll give you a screenshot of a document I use for PCB design that gives you temperature rise vs current. To prevent thermal shutdown you need to take in to account your ambient temperature, then add the °C rise of your trace from this chart. If that number exceeds your thermal shutdown temperature you need to increase trace size. One other thing you could do is order the same PCB as with 2oz copper, which effectively doubles the amount of copper. ![image.png](//image.easyeda.com/pullimage/rMrevP0Ur08XsUvFHbKszKQdbuRBfLAsYKGvRMzv.png)
Reply
cjohnson 4 years ago
BTW, this is how you use this chart. Pick a temperature °C rise you want, match with current. Draw vertical line down to the oz copper the PCB will be (1 is standard). So if you wanted minimal temperature increase at 2.5A (10°C rise) on standard 1 oz copper, you would need a ~40 mil wide trace.
Reply
andyfierman 4 years ago
I have not yet found a good reference for calculating via dimensions and placement density (number vs. spacing) to calculate a given thermal resistance.so they still a bit of a guess.
Reply
andyfierman 4 years ago
Vias filled with solder obviously conduct heat better than unfilled vias. :)
Reply
Ibrahim Qasim 4 years ago
@cjohnson Thank you for this graph, I never knew such resources existed for PCB design. Looking over my current design makes me think that the trace widths are possibly not the cause of concern of my thermal shutdown issue since my power traces are around 80mils since I used a wide copper pour. Could my thermal vias not be implemented properly in the design here [PCB link](https://easyeda.com/iqasi096/bq24650evm-board_copy) ?
Reply
cjohnson 4 years ago
@iqasi096 Personally I would fix the thermal pad plane under U3. Does C22 and R20 need to be directly underneath it? Could they be moved to the top or moved somewhere else so you can have a large thermal plane on the bottom side with more thermal vias on that thermal pad? Maybe change the thermal pad's net to PGND instead, that way it can use the entire bottom plane as a thermal plane?
Reply
cjohnson 4 years ago
@iqasi096 Maybe get rid of R20 if you are placing it anyway, that would connect the EP (thermal pad) directly to the PGND plane possibly eliminate the thermal shutdown.
Reply
Ibrahim Qasim 4 years ago
@andyfierman Its a shame since having the via reference would be a great addition :(
Reply
Ibrahim Qasim 4 years ago
@cjohnson so the reason R20 was placed there was due to the design parameters suggested by texas instruments to eliminate noise. It was noted that it has to be directly under the BQ24650 IC. I can however move C22 but not too far from the IC to keep the signal from attenuating
Reply
Ibrahim Qasim 4 years ago
@cjohnson found here [PCB layout guideline](https://www.ti.com/lit/ug/sluu444a/sluu444a.pdf?ts=1598898275148&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FBQ24650EVM-639) on page 9 section 3. The first two points seem very counter intuitive... Is there a misunderstanding/misinterpretation happening???
Reply
cjohnson 4 years ago
![image.png](//image.easyeda.com/pullimage/GFM45BvuQUcmMlttdolZZQrqzLQvt3NJyrERd384.png) This group of 9 vias is the underside of the thermal pad directly attached to the plane. I would use this design
Reply
cjohnson 4 years ago
@iqasi096 Excuse my mistake comment. That picture is of one of the inner layers. I think the issue with your board layout is you didn't create planes on the inner layers at all.
Reply
Ibrahim Qasim 4 years ago
@cjohnson Hmmm.... I am slightly confused, I am using a two layer board, are there additional layers which are required to be fed into my current design?? I understand their board is a 4 layer board with heavier copper, but is it not possible to design a two layer board with the appropriate thermal via and trace width precautions to handle currents of up to 2.5 A across the PCB?? I apologize if I am asking some basic questions, its just I have not designed boards which supply currents greater than 1 A and all this is new to me. I am very much obliged for your help
Reply
cjohnson 4 years ago
@iqasi096 Your layer manager shows you selected 4 layers so I assumed you just forgot the inner planes. It can probably work just fine with 2 layers but you will need to move that R20 out of the way (or remove it at a sacrifice of noise) and plane it directly.
Reply
Ibrahim Qasim 4 years ago
@cjohnson Oh I understand, I must have forgotten to switch it back to 2 layers after the 3 version of this board was designed and ordered. Thanks I will look into doing that and hopefully that would fix my thermal shutdown problem. Thank you very much! :D
Reply
andyfierman 4 years ago
@iqasi096, For info, there are a number of online calculators available, based on the graphs that @cjohnson kindly uploaded. For example: [https://www.7pcb.com/trace-width-calculator.php](https://www.7pcb.com/trace-width-calculator.php) [https://www.4pcb.com/trace-width-calculator.html](https://www.4pcb.com/trace-width-calculator.html) [https://www.desmith.net/NMdS/Electronics/TraceWidth.html](https://www.desmith.net/NMdS/Electronics/TraceWidth.html) [https://www.smps.us/pcb-calculator.html](https://www.smps.us/pcb-calculator.html)
Reply
MikeDB 4 years ago
First thing to do is change the default via size to 30/15 or even better 48/24.  24/12 is for low power digital circuits and doesn't conduct either current or heat well to the bottom layer.  Also extend the areas where there is no solder resist significantly.   The actual trace sizes look good though.
Reply
Login or Register to add a comment
goToTop
你现在访问的是EasyEDA海外版,建议访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
svg-battery svg-battery-wifi svg-books svg-more svg-paste svg-pencil svg-plant svg-ruler svg-share svg-user svg-logo-cn svg-double-arrow -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus-@1x -mockplus-

Cookie Notice

Our website uses essential cookies to help us ensure that it is working as expected, and uses optional analytics cookies to offer you a better browsing experience. To find out more, read our Cookie Notice