Hi Shon, Without sight of your project, I'm not clear on quite how the issue affecting your tracking has arisen but if I briefly explain about the EasyEDA Design Flow, if you start with everything that is on or forms an integral part of the PCB, represented by a Schematic Symbol in the schematic and assign the appropriate PCB Footprint to every symbol, and every pin on each symbol is correctly connected and mapped to the pads of their associated PCB Footprint then when you do Convert to PCB... the correct PCB Footprints will be pulled into the PCB and all the relevant pads including on PCB footprints for things like through hole screw terminals will have all the correct net names assigned to them from the connectivity passed into the PCB from the schematic netlist. Also the holes associated with all components such as for mounting holes or single pin connectors of which screw terminals are an example, will be correctly specified and placed because they are already part of the PCB Footprint for that component. And that includes things like PCB mounting holes. Make a PCB Footprint for the hole then place a single pin connector  in the schematic for each mounting hole then assign the name of the PCB Footprint you created to represent that hole in you PCB, to the schematic symbol. Then again, when you do Convert to PCB... the PCB Footprint for the holes will automatically be pulled into the PCB. That way you will avoid any DRC errors due to trying to connect a track with a netname to something that either has a different or no netname. For more on this please see: [https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f)

Good evening AndyFierman! Thank you for the quick reply\!\!\! It is some good information for me to consume\. I have gone back and made another PCB and it doesn't do what this one does\. I have made the original one public\, called esp8266\_l293d\, and you can see with all the components that results are the same\. If you look for example at component J4\, it has several tracks coming from the ground of the L293d component\, these tracks all come from ground\, but I simply cannot end the track/wire in the center of the hole of the J4 component\, I get the 'X'\, stating it is not allowed\. I can move it back\, and the 'X' goes away\. However\, if I open a whole new PCB with or without doing the schematic first\, I can draw a wire from U2\_15 for example\, which is a pad to J4\, or from pad to another pad or another component and I can place the wire/track right in the middle of the hole\. I am assuming that the wire/track has to end in the hole, not where mine are, or the current ends just short of the component, correct? Again, I know you are incredibly busy, I can see that on the forums, so I do very much appreciate the help! sscott

For PCB connectivity the rule is that to connect any two objects together without a DRC error they must have the same net name. EasyEDA auto assigns net names in the schematic which is why it is best to start any PCB design with a properly constructed schematic. This is also why it's such a good Idea to manually name nets in a schematic because then they are easier to follow when tracking and checking the PCB. Tracks should snap to the centre of a pad irrespective of whether it has a hole in it or not. I'm not sure where the snap point is for irregular copper regions made using the Solid Region tool I'll have a look at your project but in the meanwhile, if you want to make a PCB directly without a schematic then please see: [https://easyeda\.com/forum/topic/How\_does\_the\_Connect\_Pad\_to\_Pad\_tool\_work\_\-JgQO0Ay7H](https://easyeda.com/forum/topic/How_does_the_Connect_Pad_to_Pad_tool_work_-JgQO0Ay7H)

The following video shows that the problem you have is exactly as I have described in my post above. All your tracks have different netnames. This is because you are just drawing tracks onto the PCB without regard for the fact that to join two tracks together or a track to a pad then **they must have the same netname**. EasyEDA is not simply a drawing package on which you can just draw the tracks for a PCB. Please either: 1. create a properly constructed Schematic and convert that to a PCB or; 2. use the Connect Pad to Pad tool. 

Evening -- Thank you for the honesty and taking the time to evaluate what I was doing wrong. Since it doesn't happen all the time, it was confusing me. I did take your advice, and I started with a schematic and drew everything out. When I converted it to a PCB all the lines between the components were wrong, which is what had happened previously in converting. So I didn't see the point in wasting time drawing a line in a schematic that isn't correct in a PCB layout conversion, and end up doing it all again anyway. With that said, I do understand I belive anyway, the need for the nets to be the same name, I will make sure I do that with the redo. Again, I do very much appreciate the help. I so far love the tool, just have to learn the intracacy of how it works. I do understand that it isn't just a drawing tool, otherwise I'd just use illustrator or photoshop, or better yet Fritzing :). Thank you again for your time!!! Sscott

AndyFierman -- I did try it from schematic to pcb layout, did the wire with the line from the schematic and both object had the same name. I do completely understand, and again, thank you so much for the help!!! SScott

@parkersscott, "When I converted it to a PCB all the lines between the components were wrong," I bet they weren't wrong. It's more likely that you did not properly understand what you were seeing. :) People who are new to EDA tools get confused by ratlines. For an explanation of how the Ratline connectivity in the PCB ralates to the connectivity in the Schematic please see my replies in this post: [https://easyeda.com/forum/topic/Komponents-wiered-differente-placec-on-pcb-than-wiering-diagram-c2488d098f2b4e42a287f92030043a2e](https://easyeda.com/forum/topic/Komponents-wiered-differente-placec-on-pcb-than-wiering-diagram-c2488d098f2b4e42a287f92030043a2e)

@andyfierman, You were spot on!!!! In fact the ratline mix up still made no since to me! HA    It was all on me, and I take full blame! I am loving this tool more and more. When I did the schematic, then converted, the ratlines were spot on according to the nets! Well for the most part. I didn't acturally realize it until I was redoing the pcblayout and naming all the nets and putting it together in the correct way! When a new user understands the ratlines(not that I do, yet), they soon realize that the ratline error checks for them in their connection between the nets, that it is invaluable! Thank you again for hanging in there with me, and thank you for all the documentation that you have done and are doing!!! SScott

When you get on to making your own footprints and symbols, this makes good bedtime reading: [https://docs.google.com/document/d/1ZRkPPMID68mBz9j9RMIJARNSXK12PDULZXP7kiThvDg/edit?usp=sharing](https://docs.google.com/document/d/1ZRkPPMID68mBz9j9RMIJARNSXK12PDULZXP7kiThvDg/edit?usp=sharing) :)

That should have said: [How to create findable Footprints and searchable Symbols](https://docs.google.com/document/d/1ZRkPPMID68mBz9j9RMIJARNSXK12PDULZXP7kiThvDg/edit?usp=sharing)

Sweet!! I was just looking for something to crash with tongiht! Ha I actually had a lot of questions going into that document, but I erased them until I have read the whole thing. LOL Thank you again!!! This is a great journey!!

There's a lot more background about how to get the best out of EasyEDA (by helping get into the right mindset) in section (2) as well as in (4) and (6) of: [https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f) It's all very wordy but I can't see any way to get some quite complex ideas across in a snappy chatty instagrammy pixel popping sort of way. Actually after answering the same questions from different people so many times on the forum, I am sort of getting a shortform description but it really only scratches the surface.

I didn't think the document was neccessarily wordy, if I were an engineer I might in fact find it about right. However, the non-engineer side of me was scrambling to get right to the meat and skip a bunch of the steps. Which as you know, caused me more headache in the end! I did a project as a non-engineer in 2012, and the documentation side of it, I just cringe to even do, but without it, you don't get the project details so everyone is on the same page, you cannot support what is not documented well, and those that pick it up to use(we users) are going to fail everytime. So it is a must do/must have, even if not in a "snappy chatty instagrammy pixel popping sort of way".

I think you're showing your inner engineer already! :) It's hard to get that across up front in a world where TLDR is often the defualt position. I think some of it is because ther are too few people doing too much work so there's little or no time to just sit down and read stuff. It's not seen as productive time. Plus there aren't enough people available or have the time to spare to do sanity checks and proper design reviews. For instance here's a rough idea of what _should_ go on in a proper design review: [https://docs\.google\.com/document/d/e/2PACX\-1vRhMMBzCZ\_orIFr56QyqYI8HcWsFA00evgh1cQ\_069MJRU2YUJXGWzyX3mMVnxT\-SNz1mydEicu6Bfh/pub](https://docs.google.com/document/d/e/2PACX-1vRhMMBzCZ_orIFr56QyqYI8HcWsFA00evgh1cQ_069MJRU2YUJXGWzyX3mMVnxT-SNz1mydEicu6Bfh/pub) but how often do companies have the resources for all that internally or the time and hence money to pay for it to be done externally. Such is progress in a modern world.

Shhhhh...don't tell anyone!!! :) It is so true that the 80/20 rule applies in all ways, dang shame really! I agree, you have to have a team to do a proper review, you cannot be pushed to goto market, or whatever the deadline may be, and you are right most companies aren't going to spend the money, much less the resources of the team to do it properly. I, too, do not believe bigger companies understand the resources at hand either. For example, for about 5k USD you can get a technical writer to work with the team, and outsource all the documentation, which would free up the team to do a proper design review in the beginning, along the way, and to finish up. Such progress ha :) You are making a dent though!!!