Hi
Is there a way to make a layout cell (of comp and trace) that can be placed in many location within PCB layout? More importantly, in a manner in which autorouter do not fiddle with the traces at the subcircuit level.
I'm doing a layout, without schematic, that includes multiple (6-24x) copies of a simple subcircuit. For multiple reasons, its is highly preferrential to creating a fully-routed layout-subcircuit and placing it an array rather than individually placing each comp of each copy of the subcircuit and then routing.
Thanks
Electron
4.2.12
Linux
EasyEDA
6.4.25