Use the **Pad** tool, set to **All Layers**.
Specify the netname in the **Net** attribute of the Pad.
For more, see:
[https://easyeda.com/forum/topic/How-to-fill-with-copper-custom-PCB-shape-like-this-3f49b7c92a54424f8cc43fd2f0c347eb](https://easyeda.com/forum/topic/How-to-fill-with-copper-custom-PCB-shape-like-this-3f49b7c92a54424f8cc43fd2f0c347eb)
See also the warnings about the possible unintended consequences of making changes to the PCB without having corresponding symbols in the Schematic described in (2), (4) an (6) in:
[https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f)
Thank you -
I added vias to the PCB (and not schematic - not sure how to add vias to a schematic).
The PCB looks good - except there is no solder mask on the via holes.
How can I get solder mask on the holes?
![image.png](//image.easyeda.com/pullimage/yLi8FwdmA8oWPJLeHpA6EGxFJEW83nC16njeAcrI.png)
![image.png](//image.easyeda.com/pullimage/2crKEUSq2RQWvQlNGWixyjGPnmyCaIMnZyqUCrZX.png)
To see how to add stuff - that is on or forms part of the PCB - to the Schematic, please see the linked documents that I referred you to above,
Please click on the **Generate Gerber** button to generate and check the Gerbers to check your PCB layout (as is detailed in (6) above) to see the solder mask over the vias.
You can use the in-house Gerber Viewer or install a copy of gerbv:
[http://gerbv.geda-project.org/](http://gerbv.geda-project.org/)
Thank you -
I did your references.
But the vias are aleady part of the PCB lib, as thermal heat pipes and the via nets are defined in the PCB lib.
So why don't they have solder mask?
@peternarbus
We design add solder mask automatically for the pads vias, in the future, we will support them separately.
if you want to add the extra solder mask, you need to enable the solder mask layer in layers tool. And then use Rect to draw the solder mask.
[https://docs.easyeda.com/en/PCB/Layers-Tool/index.html](https://docs.easyeda.com/en/PCB/Layers-Tool/index.html)
@peternarbus,
Looking at the Gerbers generated from your UTS light version 1.4, in the JLCPCB Gerber Viewer, as I said above, you will see that the vias **are covered** in solder mask:
![image.png](//image.easyeda.com/pullimage/kUaX2sBgGWG1TM91ruIwq05H7aKmFwKilJPjQLBW.png)
If you want the vias to be **not covered** by solder mask then do as described by UserSupport.
* Note that editing the Solder mask layer only allows you to **remove** solder mask where there would normally be solder mask covering the copper. At present, you cannot add more solder mask to mask off additional exposed areas of copper.
Here's an example of the same PCB with a small rectangle of solder mask **removed** by **adding** a small rectangle to the solder mask layer:
![image.png](//image.easyeda.com/pullimage/lmyjuQk3193UPzmYTEiDAAIUqTKy1k6eQwIMuYbq.png)
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