{* LM3914 Bar/dot display driver * V1.0 * * Model by Geoff Western. * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*i(rs)*(V(dvin)>0)*((V(dvin)<(V(dv)+1m))|(V(mode)+0.1>=V(Vp))) B2 L2 Vn I=1u-10*i(rs)*(V(dvin)>V(dv))*((V(dvin)<2*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*i(rs)*(V(dvin)>2*V(dv))*((V(dvin)<3*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*i(rs)*(V(dvin)>3*V(dv))*((V(dvin)<4*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*i(rs)*(V(dvin)>4*V(dv))*((V(dvin)<5*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*i(rs)*(V(dvin)>5*V(dv))*((V(dvin)<6*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*i(rs)*(V(dvin)>6*V(dv))*((V(dvin)<7*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*i(rs)*(V(dvin)>7*V(dv))*((V(dvin)<8*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*i(rs)*(V(dvin)>8*V(dv))*((V(dvin)<9*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*i(rs)*(V(dvin)>9*V(dv))*((V(mode)+0.1>=V(Vp))|(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12k Ric Vp Vn 4k B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 D D2 Vn L2 D D3 Vn L3 D D4 Vn L4 D D5 Vn L5 D D6 Vn L6 D D7 Vn L7 D D8 Vn L8 D D9 Vn L9 D D10 Vn L10 D Rm2 mode Vn 10meg I1 Vp Adj 75µ Rs N001 Vn 50 B11 Ref N001 V=min(v(Vp)-v(Vn)-.3,1.25+v(adj)-v(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) B15 Vp Vn I=1m1-4*i(B11) Rm1 Vp mode 350k .ends lm3914}

@toozie21, Welcome to EasyEDA. Please repost the netlist using the `Block quote` formatting tool (`{}`) in the reply box. Please also see (3) in: https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f

Sorry about the formatting, I couple of times, but it seems to keep messing up (it keeps only putting the first line in the quote format. I'll try again below. Thanks!! * LM3914 Bar/dot display driver * V1.0 * * Model by Geoff Western. * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*i(rs)*(V(dvin)>0)*((V(dvin)<(V(dv)+1m))|(V(mode)+0.1>=V(Vp))) B2 L2 Vn I=1u-10*i(rs)*(V(dvin)>V(dv))*((V(dvin)<2*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*i(rs)*(V(dvin)>2*V(dv))*((V(dvin)<3*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*i(rs)*(V(dvin)>3*V(dv))*((V(dvin)<4*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*i(rs)*(V(dvin)>4*V(dv))*((V(dvin)<5*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*i(rs)*(V(dvin)>5*V(dv))*((V(dvin)<6*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*i(rs)*(V(dvin)>6*V(dv))*((V(dvin)<7*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*i(rs)*(V(dvin)>7*V(dv))*((V(dvin)<8*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*i(rs)*(V(dvin)>8*V(dv))*((V(dvin)<9*V(dv)+1m)|(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*i(rs)*(V(dvin)>9*V(dv))*((V(mode)+0.1>=V(Vp))|(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12k Ric Vp Vn 4k B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 D D2 Vn L2 D D3 Vn L3 D D4 Vn L4 D D5 Vn L5 D D6 Vn L6 D D7 Vn L7 D D8 Vn L8 D D9 Vn L9 D D10 Vn L10 D Rm2 mode Vn 10meg I1 Vp Adj 75µ Rs N001 Vn 50 B11 Ref N001 V=min(v(Vp)-v(Vn)-.3,1.25+v(adj)-v(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) B15 Vp Vn I=1m1-4*i(B11) Rm1 Vp mode 350k .ends lm3914

Thanks for the reformatting. The problem is that the B sources for the outputs is a syntax that is not supported in Ngspice. The use of things like: `B = V(netnames) > value` is documented for LTSpice here: http://ltwiki.org/index.php5?title=B_sources_(complete_reference) but there is no direct equivalent in Ngspice so you have to restructure the expressions using something like: `B = U(V(netname) > value)` My link above includes a table of functions that can be used or easily pasted in to EasyEDA models. Please post back if you need more help.

My bad... I meant: `V = V(netnames) > value` and: `V = U(V(netnames) > value)`

@andyfierman THank you so much for bearing with me, I've been doing research every night for about a week and am coming up empty (I am REALLY new to spice) I don't think I follow what you suggested. I tried a could of different things, but I get the same number of errors. I think that you are saying that this statement won't work: B1 L1 Vn I=1u-10*i(rs)*(V(dvin)>0)*((V(dvin)<(V(dv)+1m))|(V(mode)+0.1>=V(Vp))) You said that the B statement didn't have an equivalent, so I redid it where I ONLY changed the V(net) > number type things to be U(V(net) > number). Is that not what you meant? I assume that there is not LTSpice too NGSpice table somewhere to see the different functions and close equivalents? Here is How I reroute the above command: B1 L1 Vn I=1u-10*i(rs)*(U(V(dvin)>0))*((U(V(dvin)<(U(V(dv))+1m)))|(U(V(mode)+0.1)>=U(V(Vp)))) OK, let me try to talk through what I think is happening in that statement: *B1 means a new arbitrary statement *L1 means net L1 *Vn means my Vn net *I= is solving a current value using one super long expression *Since "V(net) > number" isn't supported, you had me change that to U(V(net) > number) to set a urinary value. That all seems reasonable to me, I just don't know why I am still getting errors.

OK, I am getting there. I had a couple of typos and then the OR needed to be | instead of || Now, my netlist looks like: * LM3914 Bar/dot display driver * V1.0 * * Model by Geoff Western. * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*i(rs)*U(V(dvin)>0)*(U(V(dvin)<(V(dv)+1m))||U((V(mode)+0.1)>=V(Vp))) B2 L2 Vn I=1u-10*i(rs)*U(V(dvin)>V(dv))*(U(V(dvin)<2*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*i(rs)*U(V(dvin)>2*V(dv))*(U(V(dvin)<3*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*i(rs)*U(V(dvin)>3*V(dv))*(U(V(dvin)<4*V(dv)+1m)||U(V(ode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*i(rs)*U(V(dvin)>4*V(dv))*(U(V(dvin)<5*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*i(rs)*U(V(dvin)>5*V(dv))*(U(V(dvin)<6*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*i(rs)*U(V(dvin)>6*V(dv))*(U(V(dvin)<7*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*i(rs)*U(V(dvin)>7*V(dv))*(U(V(dvin)<8*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*i(rs)*U(V(dvin)>8*V(dv))*(U(V(dvin)<9*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*i(rs)*U(V(dvin)>9*V(dv))*(U(V(mode)+0.1>=V(Vp))||U(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12k Ric Vp Vn 4k B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 D D2 Vn L2 D D3 Vn L3 D D4 Vn L4 D D5 Vn L5 D D6 Vn L6 D D7 Vn L7 D D8 Vn L8 D D9 Vn L9 D D10 Vn L10 D Rm2 mode Vn 10meg I1 Vp Adj 75µ Rs N001 Vn 50 B11 Ref N001 V=min(v(Vp)-v(Vn)-.3,1.25+v(adj)-v(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) B15 Vp Vn I=1m1-4*i(B11) Rm1 Vp mode 350k .ends lm3914 And I cut down my errors to: Circuit: good* no system model for lm3914, you can create a model by yourselfuntitled Error on line 0 : d.x2.d1 0 led3_2 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d2 0 led3_2 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d3 0 led2_2 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d4 0 x2_16 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d5 0 x2_15 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d6 0 x2_14 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d7 0 x2_13 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d8 0 x2_12 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d9 0 x2_11 d Unable to find definition of model d - default assumed Error on line 0 : d.x2.d10 0 x2_10 d Unable to find definition of model d - default assumed Error on line 0 : b.x2.b15 12vstart 0 i= 1.0000000000e-03 1.0000000000e+00 - 4.0000000000e+00 * i(b.x2.b11) unknown parameter (1.0000000000e+00) errors/warnings in your design, please fix them if you need errors/warnings in your design, please fix them if you need. Doing analysis at TEMP = 27.000000 and TNOM = 27.000000 Fatal error: b.x2.b10: unknown controlling source x2.rs doAnalyses: no such parameter on this device dc simulation(s) aborted ngspice-26 done I will keep plugging away, but is someone knows what this means before I write again, I'd love to heard it!

OK, I am slowly getting close, but I have one last hurdle I believe. Here is where things sit currently: * LM3914 Bar/dot display driver * V1.0 * * Model by Geoff Western. * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*i(rs)*U(V(dvin)>0)*(U(V(dvin)<(V(dv)+1m))||U((V(mode)+0.1)>=V(Vp))) B2 L2 Vn I=1u-10*i(rs)*U(V(dvin)>V(dv))*(U(V(dvin)<2*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*i(rs)*U(V(dvin)>2*V(dv))*(U(V(dvin)<3*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*i(rs)*U(V(dvin)>3*V(dv))*(U(V(dvin)<4*V(dv)+1m)||U(V(ode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*i(rs)*U(V(dvin)>4*V(dv))*(U(V(dvin)<5*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*i(rs)*U(V(dvin)>5*V(dv))*(U(V(dvin)<6*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*i(rs)*U(V(dvin)>6*V(dv))*(U(V(dvin)<7*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*i(rs)*U(V(dvin)>7*V(dv))*(U(V(dvin)<8*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*i(rs)*U(V(dvin)>8*V(dv))*(U(V(dvin)<9*V(dv)+1m)||U(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*i(rs)*U(V(dvin)>9*V(dv))*(U(V(mode)+0.1>=V(Vp))||U(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12k Ric Vp Vn 4k B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 +DIODE D2 Vn L2 +DIODE D3 Vn L3 +DIODE D4 Vn L4 +DIODE D5 Vn L5 +DIODE D6 Vn L6 +DIODE D7 Vn L7 +DIODE D8 Vn L8 +DIODE D9 Vn L9D +DIODE D10 Vn L10 +DIODE Rm2 mode Vn 10meg I1 Vp Adj 75µ rs N001 Vn 50 B11 Ref N001 V=min(V(Vp)-V(Vn)-.3,1.25+V(Adj)-V(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) *B15 Vp Vn I=1m1-4*i(B11) B15 Vp Vn I=1100000-4*i(B11) Rm1 Vp mode 350k .MODEL DIODE D + IS = 5E-014 + N = 10 + RS = 1E+005 .ends lm3914 I am not sure if I am doing the DIODE line right, but it seems to not be screwing this up anymore. Mu current and last error: Circuit: good* no system model for lm3914, you can create a model by yourselfuntitled Doing analysis at TEMP = 27.000000 and TNOM = 27.000000 Fatal error: b.x2.b10: unknown controlling source x2.rs doAnalyses: no such parameter on this device dc simulation(s) aborted ngspice-26 done So it leads me to believe that the RS line isn't working right. I am guessing it is the line: rs N001 Vn 50 Could it be that net N001? Also the line: B15 Vp Vn I=1100000-4*i(B11) Was originally a 1M1, but I don't think ngspice can handle it, so I changed it to 1100000. Any ideas what I am missing, or if I should handle the DIODE differently in ngspice? TIA!

Also the line: `B15 Vp Vn I=1100000-4*i(B11)` Was originally a 1M1, but I don't think ngspice can handle it, so I changed it to 1100000. You must read the section on `About naming conventions` in the linked document in (3) of: https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f `m` or `M` in spice both represent 1e-3 NOT 1e6. 1e6 in spice is `Meg` https://docs.google.com/document/u/1/d/1OWZVVFRAe_2NW3WratpkA_SGuHa5AcRow5ZRfvcoVTU/pub#h.3dy6vkm I'll get back to you with more help tomorrow.

@andyfierman Thanks for the link and correction. I was going off of the resistor nomenclature in the physical world, I will make the correction in the subckt. Thanks also for the links. The ngapice sourceforge page has been down (not sure if that is a permanent thing), so I have been floundering a bit trying to come up with examples and some of the generic documentation besides what you have so awesomely posted! I'll keep an eye out for another post tomorrow. Thanks again.

* Your diode model can simply be: `.model D D()` or even just `.model D D` * You can ignore the message: `Circuit: good* no system model for lm3914, you can create a model by yourselfuntitled` It is just a clumsy way of saying that there is no model for the LM3914 in the System library so you have to make your own (it doesn't know that that is exactly what you have done). * Something you do need to be aware of is that the expressions in the original model use the `|` character as a Boolean `OR`. In ngspice the syntax for a Boolean `OR` is `||`. See: `2.8.5 Syntax of expressions` in: http://ngspice.sourceforge.net/docs/ngspice-manual.pdf (which is up for me OK. If you're using Firefox, it may just have downloaded the pdf directly. Check your downloads folder.)

Another gotcha. `Fatal error: b.x2.b10: unknown controlling source x2.rs doAnalyses: no such parameter on this device` In LTspice, you can monitor the current in a resistor directly hence the instances of `i(rs)` You cannot do this in ngspice. You have to insert a 0V source in series with the resistor, call it something like `Vimonrs1` and then call up `i(Vimonrs1)`. See **Probing currents** in: https://docs.google.com/document/u/1/d/1OWZVVFRAe_2NW3WratpkA_SGuHa5AcRow5ZRfvcoVTU/pub#h.1y810tw in the online EasyEDA Simulation eBook.

@toozie21, Please accept my apologies. I have misled you. Ngspice **does** support the same type of `B1 out 0 V=(V(in)>=V(ref))` structure as LTspice. So if you take the original .subckt and replace all the instances of `|` with `||` then I think the subckt should run OK. I haven't had time to check it in EasyEDA yet but here's the modified .subckt: * LM3914 Bar/dot display driver * V1.0 * * Orginal LTspice model by Geoff Western. *********************************************** * Edited for ngspice/EasyEDA compatibility * signality.co.uk 180221 *********************************************** * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*i(Vrs)*(V(dvin)>0)*((V(dvin)<(V(dv)+1m))||(V(mode)+0.1>=V(Vp))) B2 L2 Vn I=1u-10*i(Vrs)*(V(dvin)>V(dv))*((V(dvin)<2*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*i(Vrs)*(V(dvin)>2*V(dv))*((V(dvin)<3*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*i(Vrs)*(V(dvin)>3*V(dv))*((V(dvin)<4*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*i(Vrs)*(V(dvin)>4*V(dv))*((V(dvin)<5*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*i(Vrs)*(V(dvin)>5*V(dv))*((V(dvin)<6*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*i(Vrs)*(V(dvin)>6*V(dv))*((V(dvin)<7*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*i(Vrs)*(V(dvin)>7*V(dv))*((V(dvin)<8*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*i(Vrs)*(V(dvin)>8*V(dv))*((V(dvin)<9*V(dv)+1m)||(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*i(Vrs)*(V(dvin)>9*V(dv))*((V(mode)+0.1>=V(Vp))||(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12k Ric Vp Vn 4k B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 D D2 Vn L2 D D3 Vn L3 D D4 Vn L4 D D5 Vn L5 D D6 Vn L6 D D7 Vn L7 D D8 Vn L8 D D9 Vn L9 D D10 Vn L10 D Rm2 mode Vn 10meg I1 Vp Adj 75µ Vrs N001 N1001 0 ; insert 0V source to monitor current in Rs Rs N1001 Vn 5 ; modify NET001 to NET1001 B11 Ref N001 V=min(v(Vp)-v(Vn)-.3,1.25+v(adj)-v(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) B15 Vp Vn I=1m1-4*i(B11) Rm1 Vp mode 350k .model D D ; to remove warning message about model for D .ends lm3914 Let me know how you get on and I'll try to tidy up the spurious -0.6V on the unconnected pins.

Don't forget to unwrap the lines in the above listing if necessary when you copy and paste it. I forgot that the forum formatting would wrap the lines...

Andy, Thanks for keeping n top of this for me. I actually got it working I think about an hour before you posted. Thanks to all your points and guiding me to what was LTSpice specific commands, I finally muddled through it. Here is what I ended up with (keep in mind that this was done before your last 2 posts: * LM3914 Bar/dot display driver * V1.0 * * Model by Geoff Western. * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>0)*(U(V(dvin)<(V(dv)+.001))||U((V(mode)+0.1)>=V(Vp))) B2 L2 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>V(dv))*(U(V(dvin)<2*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>2*V(dv))*(U(V(dvin)<3*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>3*V(dv))*(U(V(dvin)<4*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>4*V(dv))*(U(V(dvin)<5*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>5*V(dv))*(U(V(dvin)<6*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>6*V(dv))*(U(V(dvin)<7*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>7*V(dv))*(U(V(dvin)<8*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>8*V(dv))*(U(V(dvin)<9*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>9*V(dv))*(U(V(mode)+0.1>=V(Vp))||U(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12e3 Ric Vp Vn 4e3 B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 D2 Vn L2 D3 Vn L3 D4 Vn L4 D5 Vn L5 D6 Vn L6 D7 Vn L7 D8 Vn L8 D9 Vn L9 D10 Vn L10 Rm2 mode Vn 10e6 I1 Vp Adj 75e-6 *Vimonrs1 Rs N001 0 Vimonrs1 N001 Vn 0 *Rs N001 Vn 50 B11 Ref N001 V=min(V(Vp)-V(Vn)-.3,1.25+V(Adj)-V(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) *B15 Vp Vn I=1m1-4*i(B11) B15 Vp Vn I=.001-4*I(B11) Rm1 Vp mode 350e3 .MODEL DIODE D .ends lm3914

If you look at my last netlist, you'll see what I meant about inserting a voltage source in series with Rs as a current monitor. The way you have tried to do it has replaced `Rs` with `Vimonrs1` instead of adding it in series. * Your D1 to D10 instances are missing the `DIODE` that would make your `.MODEL DIODE D` statement work OK. * Assuming that Geoff Western's value is correct, we are both wrong in the way that we have described `B15`. It should be: `B15 Vp Vn I=1.1m-4*i(B11)` I should point out that I haven't checked the original model against the actual device so I have no idea how well it represents the datasheet parameters of the LM3914. Geoff's model looks to be a basic behavioural model of the chip functionality so don't expect it to represent actual device behaviour very closely in terms of things like signal propagation delays, input impedance, supply, output leakage and input bias currents or input, output and supply pin behaviours vs. output currents and above/below/reverse rail voltages. Depending on how you are using the model in simulation it may not converge well since it is full of effectively instantaneously switching sources (the Simulation eBook mentions replacing voltage B sources with current B sources in parallel with a 1R resistor and a small capacitor to create bandwidth limited sources to help with this sort of problem). :)

@andyfierman Thanks Andy, I think it is pretty close. Your changes didn't seem to change the plot much for some reason, but I made the changes anyway because you are the king of this stuff. My current subckt is: * LM3914 Bar/dot display driver * V1.0 * * Model by Geoff Western. * This is a work-in-progress. * Pin 9 (Mode) bias arrangement, Ref source resistance Rs, and Ref plateau are speculative. * Clamp diodes D1-D10 are a kludge to prevent B1-B10 producing fatal run-time errors in the sim * for unconnected output pins, so introduce spurious -0.6V at unconnected pins. * .subckt lm3914 mode Sig Rhi Vp Vn Adj L1 L10 L2 L3 L4 L5 L6 L7 L8 L9 Ref Rlo B1 L1 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>0)*(U(V(dvin)<(V(dv)+.001))||U((V(mode)+0.1)>=V(Vp))) B2 L2 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>V(dv))*(U(V(dvin)<2*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B3 L3 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>2*V(dv))*(U(V(dvin)<3*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B4 L4 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>3*V(dv))*(U(V(dvin)<4*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B5 L5 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>4*V(dv))*(U(V(dvin)<5*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B6 L6 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>5*V(dv))*(U(V(dvin)<6*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B7 L7 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>6*V(dv))*(U(V(dvin)<7*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B8 L8 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>7*V(dv))*(U(V(dvin)<8*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B9 L9 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>8*V(dv))*(U(V(dvin)<9*V(dv)+.001)||U(V(mode)+0.1>=V(Vp))) B10 L10 Vn I=1u-10*I(Vimonrs1)*U(V(dvin)>9*V(dv))*(U(V(mode)+0.1>=V(Vp))||U(V(mode)>=V(L9)-0.9)) Rladder Rhi Rlo 12e3 Ric Vp Vn 4e3 B12 dvin 0 V=v(sig)-v(rlo) B13 dv 0 V=(v(rhi)-v(rlo))/10 D1 Vn L1 D D2 Vn L2 D D3 Vn L3 D D4 Vn L4 D D5 Vn L5 D D6 Vn L6 D D7 Vn L7 D D8 Vn L8 D D9 Vn L9 D D10 Vn L10 Rm2 mode Vn 10e6 I1 Vp Adj 75e-6 Vimonrs1 N001 N1001 0 ; insert 0V source to monitor current in Rs Rs N1001 Vn 5 ; modify NET001 to NET1001 B11 Ref N001 V=min(v(Vp)-v(Vn)-.3,1.25+v(adj)-v(Vn)) B1a L1 Vn I=150u*(V(mode)<(V(Vp)-0.1))*(V(dvin)>(V(dv)/10)) *B15 Vp Vn I=1m1-4*i(B11) *B15 Vp Vn I=.001-4*I(B11) B15 Vp Vn I=1.1m-4*i(B11) Rm1 Vp mode 350e3 .MODEL DIODE D .ends lm3914 My problem now is that to clean things up, I "created" a part and imported the subckt, but when I drop the part into my schematic it doesn't work. I made my project public in case you want to see it. I am not having the issue where the subckt isn't being saved to the part properly, it is just not working when I got to simulate....

Have you tried running the subckt just as a pasted in net without the .subckt and the .ends lines? There's an example of this somewhere in the eBook. Have you tried running the subckt I posted last night?

The subckt works fine when pasted in as text to the schematic and then changing the type to spice. I didn't start having issues until I attempted to put it into a part. I went into the parts design and removed the first real line (the subckt line) as well as the last line (.ends) but it didn't make a difference. I also tried getting rid of the comments in the spice, but that didn't help either.

I haven't had tme to play with this much but I have created a spice symbol: `LM3914N_GW` and run it successfully in a sim using Geoff Western's original model lightly edited for EasyEDA compatibility and with the spice pin numbering reordered to match the physical pinout for simplicity: https://easyeda.com/andyfierman/LM3914N_GW_spice_symbol_and_model_demo-6924dfd6c55049ca9c7eae1219aaa0c5