See examples of SCHMITTINVEE and SCHMITTNAND2EE in https://easyeda.com/example/Easy_logic_device_simulation_in_V2_3_x_onwards-RaKIG2oJ5

See also: https://easyeda.com/Doc/Simulation-eBook/Initial-conditions-and-starting-up-circuits.htm#Initial-conditions-and-starting-up-circuits

Thank you. It was only a initial condition statement... My circuit simulate now. The waveforms are correct. But the threshold for the SCHMITT Trigger are fixed in the model to 1/3 and 2/3 of the VDD voltage. So I want to modify these values : First I extract the .SUBCKT for the SCHMITTNAND2EE. Then I follow instructions to place it in a spice command inside the circuit drawing. I renamed the Gate AND the .SUBCKT to SCHMITTNAND2EE But when I run a simulation, the waveform is not correct. I tried to change initial conditions, value for VDD, but whith no success. I join the "good" circuit and waveforms and the bad one.... Any idea ?

![Good circuit][1] ![Good waveforms][2] ![Bad circuit][3] ![Bad waveforms][4] [1]: /editor/20160404/57016c28ef6b5.png [2]: /editor/20160404/57016c4224764.png [3]: /editor/20160404/57016c59c7fc7.png [4]: /editor/20160404/57016c8a99bdc.png

I put the 2 circuits in a public project : "4093 Project". JM

Ah, Sorry about that but the way have written the SPICE models for the EasyEDA logic devices, I have used the tilde character to signify a logical inversion. This is allowed in ngspice (the version of SPICE used in EasyEDA) but it is not parsed correctly in the EasyEDA schematic editor because the tilde character is used for the JSON formatting. If I get the time I may go through the library and replace the tilde inversions with discrete inverter gates but in the meanwhile, the simplest workaround is if you can tell me what thresholds you would like and I will add a modified version to the library, then let you know when it is available. I'm a bit limited for editing at present because I only have a smartphone available right now! :)

Thank you for your help. I need a 12 V power supply (actually, over 11 V creates error and a bad simulation result. And thresholds I need are 4,2 and 5,2 volts. With that il will be fine. Again for translation, tell me what I can do.... JM

What error message do you get with a 12V supply? The SCHMITTNAND2EE and SCHMITTINVEE primitives should OK up to 18V. Please note that trigger levels of 5.2V and 4.2V are unrealistic for a real 4093 or other CMOS type devices with a 12V supply. Are you trying to model a specific circuit with these parameters rather than a generic CMOS logic gate with Schmitt trigger inputs?

OK, I can reproduce the fault at above 11V. I am working on a fix for this and to remove the tilde parsing problem.

If you're feeling adventurous, you could try this out. You should be able to copy and paste (or download as a text file) a modified subckt from here: https://docs.google.com/a/easyeda.com/document/d/1-iewivA9moRobxfb4HivOFH52MZp-zTP8K6S_K1zDCI/edit?usp=docslist_api I cannot be sure it will work because I have not been able to test it yet. I may be able to do that tomorrow...

for a 10v supply, datasheets gives 4,2 and 5,2 Vtrig levels. [enter link description here][1] page 7 With the original SCHMITTNAND2EE, 12V is ok. just trig levels needs to be changed. if you can just change the values to 4,2 and 5,2 it will be ok. With .SUBCKT in the drawing, with 12V supply, The simulation runs. but show ![waveform][2] only a charge to 6V for the capacitor and output goes to 6V and stays. it seems as if the trigger doesn't works... Thank you. [1]: http://www.nxp.com/documents/data_sheet/HEF4093B.pdf [2]: /editor/20160407/5705e7d7cd924.png

Sorry, my Google Docs link does not work. That version does work but I will post a link to my fixed version with the trip levels for the HEF4093 later today (thanks for the link to the datasheet. I was not aware of that variant of the 4093 device). Sorry this is taking a while but I am away from anything with a real keyboard and operating system so I am having to use a few workarounds to redevelop your model.

Hi, *"If you're feeling adventurous, you could try this out..."* ==> Yes I am. The Supply voltage works fine now. (with the .SUBCKT in the drawing) : Threshold refering to (VDD-VSS) and respecting the **typical values** found in the HEF4093B datasheet (NXP Semiconductors N.V. 2015 - page 7). are given by : VT+ = (VDD-VSS) * 0,44 + 0,7 VT- = (VDD-VSS) * 0,38 + 0,3 I tried to include this in the .subckt you provided. I creates a new modified version : SCHMITTNAND2EE_mod02 Changes are only for the 2 lines definig the VT+ and VT- thresholds in the .param section : initial lines : + hith = {2/3} ; upper threshold as a ratio of VDD-VSS. + loth = {1/3} ; lower threshold as a ratio of VDD-VSS. modified lines : + hith = {0.44/1} + 0.7 ; upper threshold as NXP Semiconductors datasheet. + loth = {0.38/1} + 0.3 ; lower threshold as NXP Semiconductors datasheet. BUT : the + 0.7 and + 0.3 directive don't work...... Adn I don't know how to change it.....

Since you took a copy of the mod01 subckt, I have tried to incorporate the HEF4093 threshold vs. supply behaviour but I have made a mistake in it somewhere. I am trying to fix it now. The problem with the threshold expressions you have used are: 1) the format of the brackets is not correct. The curly brackets must always be the outermost pair. Inner brackets are the simple (...) pair. 2) the high and loth parameters are not absolute values. They represent the proportions of the supply at which the thresholds are set. The thresholds of the HEF4093 are not simple fractions of (VDD-VSS). The Schmitt trigger stages are fed by signals that have a 0 to 1V swing (all inputs are normalised from the (VDD-VSS) voltage difference to 1V. This is for consistency with all the other EasyEDA logic devices). This means that the hith and loth values define thresholds that are always some fraction of the supply. To recreate the thresholds at a (VDD-VSS) of 12V, you have to find the fraction of 12V that 4.2V and 5.2V represent and then use those numbers for high and loth respectively. Assuming that 12V that 4.2V and 5.2V are the numbers you want then: hith={5.2/12} loth={4.2/12} should give you the correct thresholds, but **only** at a 12V supply.

Yes I also tried hith={5.2/12} and loth={4.2/12} and it works fine.... but as you said only for 12V supply. That's why I tried to creates the value by {0.44/1} + 0.7 and loth = {0.38/1} + 0.3. But ok I undestand my mistakes. I take a look deeper inside the structure. And in the * Behavioural Schmitt function, I'm trying to understand and first to creates 2 new variables hithNXP and lothNXP. So the original equation has just a few modifications. I'll give you my results.

Fixed it. Please copy and paste the updated 02 version of the subckt from the same URL in Google Drive. You can also run the whole simulation in a handy little netlist only site here: http://www.ngspice.com/index.php?public_circuit=f4oDR4 If you look at the expressions for Bschmitt1 and Bschmitt2 you will see a couple of terms of the form `(V(vss, vss)*a+b)` One defines what was the `loth` and the other the `hith-loth` values now as functions of VDD-VSS. Note that in SPICE, V(x,y) is the same as (V(x)-V(y)). I will build a proper HEF4093 model and add it to the library next week. :)

Thanks a lot for your work. All is ok now. I will soon submit anaother problem I have with PWL sources... Thank you again for the job.