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Random DRC errors
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benjaminds 5 years ago
Hi, I'm making an arduino robot but I'm having issues with random DRC errors while connecting nets. Is there any way I can tell the program manually that the DRC errors are okay and that it shouldn't worry about it? xD [https://easyeda.com/benjaminds/hoofdschema-pcb](https://easyeda.com/benjaminds/hoofdschema-pcb) P.S. look at arduino buggy 2.0 and not the original one
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UserSupport 5 years ago
hi I not really understand the problem, can you add a GIF or any information if you mean when you routing will show the DRC error that is real-time DRC error.
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benjaminds 5 years ago
@UserSupport it gives 58 DRC errors like this one, it just gives an error because it doesn't know I actually want to merge the nets.![image.png](//image.easyeda.com/pullimage/joDslSni7RBHLLdqEyKd6TVN0Nmhvf8AFCGi4wUJ.png)
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UserSupport 5 years ago
Hi if two track get too close and they have different net, the DRC will show the error, editor will treat that as shorted circuit. [https://docs.easyeda.com/en/PCB/Design-Rule-Check/index.html](https://docs.easyeda.com/en/PCB/Design-Rule-Check/index.html) ![image.png](//image.easyeda.com/pullimage/kQZd3l2DFpYRob6yPPCTYJTcKd099o8X25oGAojV.png)
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benjaminds 5 years ago
@UserSupport Well that is my problem, the nets have to be shorted, I've got dozens of problems with the nets so I copy-pasted the design without the nets and hoped that it wouldn't copy the nets too. now that isn't the case and I'm just routing looking at my schematic instead of the nets. I already made a PCB with the nets and only the nets were working so the nets don't work for my design and idk why. So can I just make the PCB ignoring the DRC errors?
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benjaminds 5 years ago
@UserSupport Could you also explain why in screenshot 1 theres 1 arduino wich is normal but in screenshot 2 there are 2?!
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benjaminds 5 years ago
@UserSupport lol I can't upload the screenshot it's PNG and it should be supported -_-
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andyfierman 5 years ago
@benjaminds, Is this a public project? Can you post the link to it?
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benjaminds 5 years ago
@andyfierman [https://easyeda.com/benjaminds/hoofdschema-pcb](https://easyeda.com/benjaminds/hoofdschema-pcb)
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benjaminds 5 years ago
@andyfierman Could you explain how I can delete all nets? I'm getting over 200 DRC errors because it thinks I'm making shorts but actually I'm correcting the nets that are wrong in one way or another?
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UserSupport 5 years ago
@benjaminds Hi You can use the global delete function to delete all tracks. and then routing again. ![image.png](//image.easyeda.com/pullimage/IvYMGaDyAcSNGN8kZSIhWb18yetkkt3SQNMoejeU.png)
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benjaminds 5 years ago
@UserSupport That's not the problem, I want to delete the nets so that I don't get RATlines and none of the pins are assigned. I want to delete the assignments so that I can route it myself because the nets are wrong.
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andyfierman 5 years ago
@benjaminds, That's a very unhelpful way to proceed because in fact you will end up having to delete all the connections in your schematic If you have generated your PCB following the Design Flow in the Tutorial, i.e. by creating a properly constructed schematic with all the right symbols and each of those symbols having the right packages assigned to them and the correct pin mappings of the symbol to the packages then when you click on Convert to PCB... you will have a PCB outline with all the correct PCB footprints pulled into the PCB Editor and all the pads correctly joined to each other by ratlines. If you do Unroute All on your existing PCB and then do Import Changes... but you do not get the same connectivity shown by the ratlines as shown by the wires and net labelling in the schematic then there's something wrong with the schematic and you need to fix that before you try to go any further with the PCB layout. Don't forget that the ratlines show connectivity and have nothing to do with how that connectivity is shown in the schematic or with how you end up routing the tracks on the PCB. For background to this please see my replies in this thread: [https://easyeda.com/forum/topic/Komponents-wiered-differente-placec-on-pcb-than-wiering-diagram-c2488d098f2b4e42a287f92030043a2e](https://easyeda.com/forum/topic/Komponents-wiered-differente-placec-on-pcb-than-wiering-diagram-c2488d098f2b4e42a287f92030043a2e) And if you haven't already then please read (2.2), (4) and (6) in: [https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f)
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andyfierman 5 years ago
@benjaminds, "That's not the problem," Yes it is because your routing on Arduino Buggy PCB is wrong. "I want to delete the nets" No you don't. You want to unroute the PCB. "so that I don't get RATlines" But you have already hidden the ratlines in the layer manager so you have no idea which pins you are supposed to be connecting together and therefore you misconnect pins instead of using the ratlines a the guide to show you which pins you have to connect with tracks. "and none of the pins are assigned." The **pads** on the PCB Footprints in the PCB will always be assigned according to how you have connected the pins on the symbols in the schematic. "I want to delete the assignments so that I can route it myself because the nets are wrong." No you don't because the nets are correct according to the schematic you have drawn and from which you did Convert to PCB... What you want to do is Unroute the PCB as UserSupport showed you and then make the ratlines visible and then track the board according to the ratlines. I would advise you to stop working on this project for a while, read the information I pointed you to in my previous post and then make yourself a much simpler project and work through it all the way from project creation, through schematic capture, conversion to PCB, routing and then Gerber generation (you do not need to actually order any PCBs). Then you will be in a much better position to successfully complete your current much more complex project. :)
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UserSupport 5 years ago
If you don't want to delete the track and remove all the tracks net, you can use Find Similar Objects, and then remove the net at the right-hand panel
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benjaminds 5 years ago
@andyfierman actually the routes are the right way, the RAT lines are wrong because there's a problem in my schematic and it imported the problem, that's why it's wrong. I routed it myself and it's alright, I'm actually making all nets manually and hoping the DRC errors don't show anymore.
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andyfierman 5 years ago
@benjaminds, In that case the recommended way to proceed (according to the EasyEDA Design Flow in the Tutorial) is to correct the schematic and then do Update PCB... / Import Changes...
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benjaminds 5 years ago
@andyfierman The problem with that is that I don't have the time to look for something that I don't even know if I'm going to find it or not. It's my school project and it has to be done this week...
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andyfierman 5 years ago
@benjaminds, But if your schematic is wrong, how do you know what the correct routing is for the PCB? The least error prone (and therefore fastest) way to get to a known good PCB is: (a) Check that: 1. the numbering and positions of the pads in the PCB footprints are correct to the relevant device datasheets; 2. the schematic symbols have the correct PCB Footprints assigned to their Package attributes; 3. the pin numbering of the schematic symbols is the same as that of the PCB footprints; 4. the symbol to package pin mapping is correct using the Footprint Manager; 5. the connectivity of the schematic is correct (use the Design Manager to help with this). (b) Then do Update PCB. (c) Then route the PCB following the Ratlines .
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benjaminds 5 years ago
@andyfierman I've already looked for all of the things you said but I haven't found anything so instead of wasting my time, I just did it manually.
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andyfierman 5 years ago
* You can delete all the wires and net labels from your schematic using the **Edit > Global Delete** option ![image.png](//image.easyeda.com/pullimage/dHdDAtHEDnAxjj5Innb5JZlSfBpmiFdLBUBQHoDr.png) then tick the **Netlabel and netFlag** and the **Wires** options: ![image.png](//image.easyeda.com/pullimage/SIyuLIQ8d52BjKQHkha1fxeyMs9zYxIJdIYRrz4n.png) then click OK. * If you _really_ want to route the PCB directly without reference to your schematic then please see: [https://easyeda\.com/forum/topic/How\_does\_the\_Connect\_Pad\_to\_Pad\_tool\_work\_\-JgQO0Ay7H](https://easyeda.com/forum/topic/How_does_the_Connect_Pad_to_Pad_tool_work_-JgQO0Ay7H) * Before submitting your pcb for manufacture you must _at least_ do the checks described in (6) in: [https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f) * If you do redraw the schematic and then do Update to PCB then you must also do the checks described in (4) of the same project.
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El-nino Rosario 5 years ago
@UserSupport  actually the problem we are facing is suppose i route my pcb and then add a net label to certain net in schematic and update in pcb then all tracks connected to that net(example ground) show DRC error.
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El-nino Rosario 5 years ago
@andyfierman   actually the problem we are facing is suppose i route my pcb and then add a net label to certain net in schematic and update in pcb then all tracks connected to that net(example ground) show DRC error.
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MikeDB 5 years ago
Yes I've noticed this as well.  You either have to relabel ever track and hole by hand, or just delete them and re-connect them again.  I'd really love to re-number the components on my board but I know it will create a huge amount of work.
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