Hello, I'm kind of new on PCB design. Most of my ground nets still show ratlines and produce a Net Error although it seems that all of those nets are connected to ground layer.
My project is below, thank you.
[Project](https://easyeda.com/editor#id=|2a8889f065e04d6581aad27458cfb41c|67bc2b02fa7f45c2a35d47135bf99efd|9c591cf601fe4d2a9372f4652fa01228|48bc47cdca57439f8a829edb15b44fe2)
Firefox
72.0
Windows
10
EasyEDA
6.3.22