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Remove unwanted 3D footprint
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CliffCoulter 3 years ago
I placed an LM324N IC in my schematic. When I converted to PCB a 3D footprint with no connections also showed up along with the normal footprint.  Not knowing what I was to do with this extra footprint I attempted to completely remove the IC from my schematic and start over.  Although the LM324N has been removed the 3D footprint is still added each time I convert to PCB.  Two questions; what was I supposedly to do with this extra footprint, and can it be removed?
Comments
CliffCoulter 3 years ago
Okay lets try this. I notice if I have four segments of a LM324 in the schematic it may show up as four separate footprints in the PCB.  Do I overlap them to create one footprint?
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MrToM 3 years ago
@CliffCoulter, Short answer.....personally _I_ don't need to, so I'd say no. Regardless of the number of sub-parts (xx.1, xx.2... etc) I only get 1 footprint in the PCB. _ Using only one sub-part of the component should only ever produce one footprint, the sub-parts for a component make for an easier to read schematic. If you only intend to use one op-amp, for example, of a quad op-amp chip then it makes sense to omit the unused op-amps from the schematic. The four sub-parts indented in the library represnt the same op-amp symbol but with pin numbers respecting the pins of each op-amp. Each symbol may also have an op-amp identifier in it, 1, 2 etc... but this is not mandatory, its down to whoever drew it. _ The alternative to this is to use the schematic smybol that represents every pin on the chip and designate the 'No contact flag' to those pins you do not need. Either way, you should only ever get one footprint in the PCB. _ Regards.
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UserSupport 3 years ago
Hi Click here to remove the 3D model ![图片.png](//image.easyeda.com/pullimage/1T7tELzUq1sgpNvqgKzPByJJZOY79IWRoZexTLIv.png) or you can save as the footprint as your own lib, and use it at your schematic via Footprint Manager
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CliffCoulter 3 years ago
Thanks for the good info.  I guess the real issue is, I seem to have a part in my schematic that is not showing up until I try to build the PCB and is only a 3D image. It is not in my schematic that I can see, but it does show in the component list. When you try to select it, cross hairs point to nothing.  I would like to delete it but don't understand how.
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MrToM 3 years ago
@CliffCoulter, Ah, sorry, got completely the wrong end of the stick there.....you were talking footprints in your original post so that's the route I took, but you mean it's an actual 3D model showing up in the 3D view but not displayed in the Schematic or PCB? _ If so then it must be in there somewhere, probably on a hidden layer. Turn every layer on and see if anything pops up when you do....it's not unknown for layers to get turned off accidentally. Whilst in the PCB use the layer and objects panel, select the 'Objects' tab on the right and just make sure that nothing is turned off.....I think 'Names' are off by default but thats ok. _ Failing that select everything you want to keep and copy it. Then select everything and delete. Then paste your parts back. That should remove everything you didn't intend being there. _ Failing that, post a link to the public project so we can take a look at it first hand. _ Regards.
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CliffCoulter 3 years ago
By the way, clicking on the 3DModel to remove didn't do it. <br> <br> <br> <br>
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CliffCoulter 3 years ago
So I'm clear, it does show up in the PCB view every time I update the PCB. I did try to copy and paste and although I was able to segregate it from the schematic, cross hairs showed it elsewhere, it copied to the next iteration. I'm working offline with the standalone EasyEDA.  I belive I could export the file. It's not a show stopper since I just delete it, but it would be nice to understand the issue.  I'm actually ready to send it in for processing.  Let me know if you would like to take a look.
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andyfierman 3 years ago
@mrtom528, Careful here... It can be dangerous to leave the inputs of unused devices in a multi-device package, unconnected. It can result in unexpected device behaviour such as oscillation leading to cross talk and EMC problems and can also cause catastrophic device failure due to things like cmos gates being triggered into thyristor action by leakage currents or stray pickup and overheating as inputs drift into illegal logic levels. Therefore in schematics that are to be converted to PCB it is good practice to place all sub-parts so that their inputs and outputs can be connected up appropriately. Note that "appropriately" should always take account of the device specifications such as input common mode limits and consequential output polarity reversals in some opamps and tying of logic inputs to ground or supply through resistors rather than direct connections. In some instances unused devices can be tied into configurations that may render them useful as aids for debugging and even  "get out of jail free" bodges for those little mistakes that we all think we could not possibly have made... For simulation schematics the situation is different because it is undesirable to waste simulation resources on device models that contribute nothing to the outcome of that simulation.
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MrToM 3 years ago
@CliffCoulter, Entirely up to you. If you make it public and post a link then everyone can help out. Issues like this are not uncommon but the solutions are many so the more examples the better...it could be beneficial to all in the future. @andyfierman, Yeah, I hear ya, but this was nothing to do with any of that. I misunderstood the original question, which I thought was about footprints and having to join sub-parts in order to make a whole component in the PCB, but, (I think), it's more an issue with something on a hidden layer...the fact there is an op-amp involved is, and I think always was, irrelevant. _ If i'm honest It was just the lack of jynnan tonyx. _ Regards.
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andyfierman 3 years ago
@mrtom528, Yesh, I undershtood the mishundershtanding of the contexsht of the original posht but having shaid about not putting the unushed shubpartsh in the shchematic, I though it besht to add the explanatshion in cashe anyone picked it up without reading the whole topic, hic. We have a Takeaway near ush called the Jinnah... would that help? _:)_
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MrToM 3 years ago
@andyfierman, Jinnah......well we're halfway there! Cheers! _ Regards.
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CliffCoulter 3 years ago
Posted at: [https://oshwlab.com/CliffCoulter/analog-iii-1-1](https://oshwlab.com/CliffCoulter/analog-iii-1-1)
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Markus_ee 3 years ago
Hi! I click the link: error 404, not found. Make sure that you have the proper sharing settings and rights. Regards, Markus Virtanen HW / Electronics Designer
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CliffCoulter 3 years ago
[https://oshwlab.com/CliffCoulter/analog-2-1-schematic](https://oshwlab.com/CliffCoulter/analog-2-1-schematic) Let's see if this works.
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andyfierman 3 years ago
@CliffCoulter, Can't see a problem with the conversion to PCB now. However, you have no power supply decoupling capacitors at all in your circuit. Please read section 10 Power Supply Recommendations of: [https://www.ti.com/lit/ds/snosc16d/snosc16d.pdf](https://www.ti.com/lit/ds/snosc16d/snosc16d.pdf) [https://www.ti.com/lit/ds/symlink/cd4066b.pdf](https://www.ti.com/lit/ds/symlink/cd4066b.pdf)<br> <br> and note that the same power supply decoupling recommendations apply to the CD4067. plus you should have at least one 10uF to 100uF electrolytic capacitor across +5V and GND at the point wheree the supply enters the board, i.e. close to J2. Please see: [https://easyeda.com/forum/topic/UPDATED-Power-supply-decoupling-and-why-it-matters-30a39d0a77f34d5d8dc77e37c035b3d3](https://easyeda.com/forum/topic/UPDATED-Power-supply-decoupling-and-why-it-matters-30a39d0a77f34d5d8dc77e37c035b3d3)<br> <br>
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MrToM 3 years ago
@CliffCoulter, Your original link worked fine for me but anyway......after exhaustive examination and several large jynnan tonyx later......I dunno. _ Something somewhere decided it was your turn to find the 'bad easter egg'. As you say, it's in the component list but not displayed in the schematic and pops up again in the PCB and 3D model. Without knowing exactly what your workflow was to get to this point it's impossible to suggest a reason for it...but...in case it happens again you _can_ remove it by editing the 'File Source' which can be found using File > File Source when viewing the schematic. _ I strongly suggest using an external text editor to search for the prefix, (U1 in this case), and deleting the one and only line of [erroneous] code that contains it. Update the schematic using the microscopic circular 'update' icon at the end of 'Components (n)' in the Design Manager. Save the schematic. Update the PCB and the problem component should be gone. _ Regards.
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CliffCoulter 3 years ago
Thanks to both of you Andy and Tom. Andy, I may be able to add a decoupling capacitor where the heavy +/- traces come together at the top of the PCB since I already submitted it for a build. The board has been functioning for 20 + years as an original wire wrap PCB. This was an update with an added humidity sensor for my home automation system. It is a 16 channel analog PCB for temperature inputs from LM335 temp sensors spotted around the home. I removed the zeroing adjustment pots for LM335's on this board and now make the adjustments in software and it seems to work well. Old tech but very reliably pumping along 24/7. Ten original wire-wrapped PCBs including this one are interfaced to a WIZ-232 controller and an OSX Mac running XOJO. Tom, I will poke around and see if I can better understand how to delete it from the source file. Thanks Cliff
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