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Routing traces ends up moving ratlines (updated) . . .
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Darryl Lawler 5 years ago
I am using the LEDXPE2 SCHLib and accompanying PCBLib created by Shashank Agarwal in my PCB.  It is the third different SCH/PCBLib from the library that has presented this problem.  They all seem to properly follow the instructions for creating a PCBLib footprint other than the implementation of a Solid Region tab at the anode and cathode solder pads.  This seems to be found in the majority of PCBLib footprints created for the component, so it must be standard practice.  I am just unsure of how to address the error it keeps causing. Every time I attempt to manually connect two pads, I pick up the ratline handle and start moving the ratline instead of manually placing a trace.  Additionally, a red dot appears where the ratline's attachment point was detached and a yellow clearance error "X" appears. It seems possible that the clearance issues detected by the Design Rule Check are preventing me from running traces. It appears that the PCBLib that I am using has a Solid Region that is overlapping the anode or cathode pads that are used for connection points.  This differing "net" forces a clearance error that I do not know how to avoid. [https://easyeda.com/darryl.lawler/led-test](https://easyeda.com/darryl.lawler/led-test) Please help. TIA! ADD: When trying to start a trace from the central thermal pad\, there are no issues\.  The editor \*will not\* allow me to draw traces from the anode or the cathode pads\.  What am I missing?
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andyfierman 5 years ago
Sorry but I haven't got time to explain right now but this copy that I've just added to the user contributed library should work: ![image.png](//image.easyeda.com/pullimage/NZUSUszLU1Jsxr1yVEbrYSYhAcFXTi2mubv2xhri.png) I think you can search for it using the tag: LEDXPE2\_CORRECTED\_PADS or maybe my username. * If it works OK, please post back and I'll check it all against the datasheet and add it to the system library.
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Darryl Lawler 5 years ago
Thank you for the effort to remedy my problem. I may be doing something wrong, but I am still unable to pull a trace from the connection pins you have configured for that footprint.  I can pull from the thermal pad.  Just not the cathode or anode. ![Screen Shot 2019-04-19 at 07.48.57.png](//image.easyeda.com/pullimage/u7pazHBhfEWlYBEOKWskvcR5QoDF0LLrtnmpI9yc.png) ![Screen Shot 2019-04-19 at 07.49.28.png](//image.easyeda.com/pullimage/CepotMqYe1JOXYSCFvj9fz9IFLgfmbKbWcYU69pu.png) I wouldn't mind creating my own component, I am just having a difficult time applying the information for the creation of the 555 timer in the tutorials to a simple diode, like this.  Further, I have reviewed your PCBLib component and I see no reason it should not work. Your continued assistance with this is greatly appreciated.
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andyfierman 5 years ago
Sorry, my bad. I was in a hurry and forgot that my symbol would call up the wrong footprint because mine has the same name as all the other wrong one. I'm away with no access to a pc but there's a way to sort this out. What you can do is: 1) find my corrected footprint (using the tag to find it) and clone it but then save it as: LEDXPE2\_CORRECTED\_PADS 2) Then, in your schematic, select the led symbol and then click on the Package attribute. That will open the Footprint Manager. In the upper right then search for: LEDXPE2\_CORRECTED\_PADS then select that footprint and then check the pin mapping. Then click Update.
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Darryl Lawler 5 years ago
Also away ATM, but I understand what's wrong and your instructions to fix it are clear enough. I'll let you know how I fare. Thank you.
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Darryl Lawler 5 years ago
I must not be understanding your instructions properly.  Here is what I am doing . . . First step is to find the SCHLib or PCBLib being discussed\.  I searched "LEDXPE2\_CORRECTED\_PADS" as you instructed and I found the follwoing:![image.png](//image.easyeda.com/pullimage/EYHjklOffAnk7HEPKaXbJnVIojxP3wQhCtj0LCDy.png) I then went ahead and cloned that and titled it as "LEDXPE2\_CORRECTED\_PADS"\. ![image.png](//image.easyeda.com/pullimage/w7VhV5tfObwy2nDv1ufDfT7cd8UGDP5Ha9u3LxTI.png) I then placed that symbol in the schematic and selected the "Package" attribute of that symbol to access the "Footprint manager" ![image.png](//image.easyeda.com/pullimage/2pr4u9U8e1pWs9uA5RTUNL7oYKDVAESWGbKRTbdv.png) ![image.png](//image.easyeda.com/pullimage/VQDRNBve2kHJHqBlidKklM5PtJo8BtvtpK9Mt4Ev.png) When I view this dialog I am unable to find the cloned footprint in my "Personal" class\.  Even when I empty the search box and try to view \*anything\* that may be in the "Personal" class no results appear despite there being a SCHLib entry in the "Library" dialog as seen above\. Any clarity you might be able to bring to this is always appreciated.  Thank you for your continued assistance.
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Darryl Lawler 5 years ago
Hoping there is a way to coordinate your updated footprint with the SCHLib so the trace routing works properly.   TIA
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UserSupport 5 years ago
You can use Select instead of Search at footprint manager
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Darryl Lawler 5 years ago
I have found the components that are now part of the system library.  Thank you for your efforts.  Greatly appreciated.
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andyfierman 5 years ago
@darryl.lawler, I'm still working on a way to implement this LED footprint without generating DRCs. You can make the centre thermal pad a rectangular top layer pad with an empty pin number or you can modify the schematic symbol to have a third pin (for example numbered as pin 3) for the thermal pad and then number the thermal pad in the footprint as pin 3 The datasheet for these leds however, shows that there should be 3 paste mask apertures in the stencil over the single, central thermal pad. See page 10 in: [https://www\.mouser\.co\.uk/datasheet/2/90/ds\_XPE2\_Torch\-519361\.pdf](https://www.mouser.co.uk/datasheet/2/90/ds_XPE2_Torch-519361.pdf) ![image.png](//image.easyeda.com/pullimage/At9RdAq32NGkdF4AHlZrDQErgpFqEC1sLtlmBq6z.png) * The problem is that EasyEDA does not allow a negative paste mask expansion value. Therefore it is not possible to create a paste mask that covers only part of a pad. It can only be the same size as or larger than the pad. I can place three small pads all numbered as pin 3 which creates the correct paste mask apertures but they are three separate pads with no exposed copper between them so you have to manually add a track across them in the PCB Editor (not the PCB Lib Editor) and then click expose the copper to get the whole area exposed to copper but only the 3 small pads creating the paste mask apertures. ![image.png](//image.easyeda.com/pullimage/zvxVfHXG5kI5wCBydic0DPH5z3qZExdrXLbWYH0E.png) If in, the PCB Lib Editor, I add a larger central pad of the right size (also numbered 3), it opens up the paste mask to the size of this centre pad and so blows away the 3 small apertures that the datasheet suggests.
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Darryl Lawler 5 years ago
If I am understanding correctly, the issue is resolved as long as I am ok with manually laying the exposed copper trace for the thermal pad. The stencil layer still will only allow a paste impression of the three individual apertures when screening paste onto the board.  During reflow, due to surface tension and capillary transport, the solder should merge to create a single pool of solder and properly join the component's thermal solder point to the thermal pad.  Correct?
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