@Mickaël BURET,

I think I understand your problem and you seem to have correctly created a basic simulation that is a good starting point.

EasyEDA is OK for many basic AC analysis simulations but it is limited because Waveform is not very good at letting you explore Bode plots.

You may be better to try to do this in LTspice:

https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html

Does your tunnel junction behave like an Esaki tunnel diode? Somewhere either in EasyEDA or LTSpice (I think the model will run in EasyEDA/ngspice) I have a simulation of a tunnel diode that I will try to find for you if you think it will help?

If you can upload some pictures of your test jig that may help in building the simulation.

:)

@andyfierman I'm not sure to understand what you mean by jig?

For experimental component, it's not really an Esaki tunnel diode. It's composed of two electrodes separated by a sub-nanometer gap. Electrons can flow by quantum effect.
Please see example of IV characteristics in the image below.

What I want, is a simulation that could "reproduce" the sweep previously presented.
Is it easy with LTspice?

Thanks

Test jig = The breadboard or PCB and test equipment that you are using to test your junction.

"Is it easy with LTspice?"

Easier because LTspice can represent a linear sweep where EasyEDA is not good at that.

Install LTspice, create a new schematic then press the F2 key to open the symbols browser (almost every symbol has a model and if not describes how to attach one).

The lossless line in LTspice is called TLINE.

Setting up sources in LTspice is similar to in EasyEDA.

A lot of the EasyEDA Simulation Tutorial still applies to LTspice except that you add probes after the first run of a simulation then they are remembered.

To repeat a plot window after closing a simulation, before closing the simulation, save the .plt plot window with the same name as the .asc simulation schematic.

I can help with LTspice if you need any more, like using behavioural sources to model the the junction.

@mickael.buret2121,

Oh.

I have just discovered that the scaling for an AC analysis in Waveform is completely wrong. The dy, dx cursors give competely wrong values. :(

Use LTspice.

Here's your sim in LTspice:

https://drive.google.com/open?id=10HtQygmjUK4bQIItVXj3LSYrWqhbjJh4

Not sure why you see peaks at 45MHz because the simulation has them at a higher frequency.

I have assumed about a 4ns/m propagation delay for your cable but even with Tdel set to the speed of light (3.3ns/m), the peaks are only about 30MHz apart. Are your electrons tunnelling through time too?

Bear in mind that you cannot represent the junction as a non-linear component in an ac sweep because the ac sweep assumes that all components are linearised about the operating point.

You can however in LTspice easily run a set of time domain sweeps at different spot frequencies with a non linear model and then use .measure statements to measure the results at points in each run and then plot the stepped results as an amplitude vs. frequency plot.

Thank you very much,
I'm playing with parameters to understand how it evolves.
But I have a question about signal computed. The signal applied to the load seems to be constant or close to, Is it normal?
I expected that the voltage applied to the load would have the trend of RFOUT.

@andyfierman, when I mentionned 45 MHz, it was for the frequency delta between peaks.

Sorry, I should have said:

"Not sure why you see peaks at 45MHz spacing because the simulation has them at a higher frequency."

You said:

"But I have a question about signal computed. The signal applied to the load seems to be constant or close to, Is it normal?
I expected that the voltage applied to the load would have the trend of RFOUT."

The voltage across the load will be constant because you have in effect created a source terminated connection. The signal propagates from a 50R source into a 50R line. As the signal enters the line it is halved because of the 50R source and 50R cable impedance attenuator. It travels down the line at half the voltage from the signal generator then hits effectively an open circuit load (because 16k >> 50R) and it reflects back along the cable to the 50R source terminating resistance f the signal generator. This bumps the voltage back up to the unattenuated signal generator output voltage and because the source is perfectly matched, there are no more reflections so everything sits at a steady state until the next edge transition.

Play with a time domain sim running for 25n, putting a single 1V 1ps rising edge step from a pulse source with Zo source impedance into an open circuit (unterminated) lossless line of impedance Zo and Td=10ns to see how the source and reflected signals interact.

Note the half voltage "shelf". The ratio of peak to shelf is a measure of the source to line impedance and the duration of the shelf is twice the propagation delay of the line.

Try the same thing using a very short pulse width (tending towards an impulse).

Understanding and interpreting this sort of plot forms the basis of Time Domain Reflectometry.

This might be a helpful visualisation:

https://www.falstad.com/circuit/e-tlterm.html

:)

Many thanks.
Inspired by your explanation, I realised something interesting. By changing a litlle bit the Z of le Tline, I have peaks that fit with my data (but with a 3m coaxial wire, that is realistic because I did the experiment 1 year ago and I'm not sure if I used 3m or 5m wire. I'm finishing manuscript of my thesis :'(  ).
I played with the impedance of the Tline and I found on internet that there is a lot of different ref for coaxial wires, that have sometime impedance a little bit different than 50R (https://fr.wikipedia.org/wiki/Câble_coaxial)
please see this capture showing the trend of the simulation with a Z=75 for the Tline:
.
The fact that I have same positions for peaks (doesn't related the value of the Tline impedance) tells me that maybe I'm going to the right interpretation.
I just need to go back to the lab and check the ref of the Tline that I used.
What do you think?

Many thanks for your explanation, I'm more specialised in optics and as you see, I'm not confortable with these notions.

@mickael.buret2121,

Reducing your line length = using a shorter Tdel in the sim. That will increase the spacing of the peaks exactly as you see. So if you had used a 3m coax instead of 5m then that would explain your peak spacing.

If you think of the transmission line in terms of light travelling down optical fibre instead of wires then does that help?

I look forwrd to reading your thesis just to find out more about this phenomenon of generating light from a sub-nanometre gap!