Hello again!
I have a four layer PCB where I have placed a solid area in layer 2 to help conduct current from several vias.
I have also modified a MOSFET footprint and added vias to it to connect to this layer. Several mosfets with this footprint is placed on the PCB.
Both the vias and the solid area have been correctly assigned the same net in the PCB and they overlap. The mosfets are placed on the bottom layer (4),
I now start the autorouter. It solves the routing quickly when I restrict it to operate on only the top and bottom layers (1 and 4) while fails when I include layer 2 as well.
In both cases the autorouter fails to use the solid area to conduct current from the vias. Instead, it connects all the vias separately on the bottom layers with separate traces.
Is there a way I can make the autorouter understand that the vias (which are multilayer) should connect to the solid area and avoid routing separate traces?
Grateful for any help.
Have you added the vias as described in:
https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6
and the linked document:
https://easyeda.com/forum/topic/How-to-place-multiple-vias-in-a-PCB-footprint-a34cf68d58414138898a56de60abd8c1 ?
I suspect that if you have simply inserted vias into the footprint post-placement rather than adding pads to the footprint pre-placement, then the Autorouter is just finding vias with the same netname that need to be connected.
You may also need to add the heatsinking areas as pads in the footprint pre-placement rather than as solid regions on layers 2 or 3.