@UserSupport,

The EasyEDA plot shows completely the wrong phase. When the netlist is run in LTspice it looks like this:

I have asked that the plotting of AC Analysis results in WaveForm be fixed but it still seems to be broken.

:)

@mathias_magdowski,

Sorry but your link does not work.

One of these links is the one you needed to post:

https://oshwlab.com/mathias_magdowski/aufgabe115



or:

https://easyeda.com/editor#mode=sim,id=3741c85511f04d75a5fffa59a34a0c81

Thanks @andyfierman for the quick answer and thanks for correcting the link.
I had also simulated the same circuit in LTspice and can confirm the results you obtained.
I had also already posted them on Twitter and will therefore only share the link and not again copy the figures here:
https://twitter.com/MMagdowski/status/1350165834229014530
Dear @UserSupport, can you comment on this?

Hi All
We will check it, and we will try to fix it at next release

Thanks

@UserSupport,

Thanks.

:)

Thanks, this is highly appreciated!