Support file input for .inc, .lib and things like XSPICE State Machine
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andyfierman 5 years ago
As you know, I am building the new digital parts library based on XSPICE parts. Low level gates like 2 ip NAND and JK Flip Flops are no problem. Higher level functions like 4 bit binary and Decade counters can be built from these low level gates but it would be good (less memory hungry!) if we could use the XSPICE State Machine to build them instead. <> The problem is that each State Machine needs a definition file but I do not think we have a way to upload and read (or write) a user file. This is also a problem because it means that we can not use things like the File Source: <> and we do not have a nice way to include files for things like user libraries or defining lots of parameters that may be common to many circuits or models. This makes many of our models much bigger than they need to be because each one has to have all the parameters in. If the common parameters could be stored in separate files then it would be much easier to change parameters in many models at once. A good example here is the new logic devices library. The first set of devices are based on CMOS 4000 series logic and all have the same logic family parameters. To create a new logic family, the family parameters in each model have to be edited. If they were in a separate file that was read (.lib or .inc) by each model then only that one parameter file would need to change to createa new logic family.
dillon 5 years ago
Try to give me a CMOS 4000 example. >based on XSPICE parts Does the user need to add a AD bridge? We would better to add the AD bridge in the model, so users just need to take them as a analog part, no bridge need.
andyfierman 5 years ago
* **State Machine/4000 series model** I will try to work out the state table for a 4 bit binary counter like the 74HC193 made using the XSPICE STATE MACHINE. There is a 2 bit example at the end of: <> ~~~~ ----------- begin file ------------- * This is an example file. This file * defines a simple 2-bit counter with one input. The * value of this input determines whether the counter counts * up (in = 1) or down (in = 0). 0 0s 0s 0 -> 3 1 -> 1 1 0s 1z 0 -> 0 1 -> 2 2 1z 0s 0 -> 1 1 -> 3 3 1z 1z 0 -> 2 3 1z 1z 1 -> 0 ------------------ end file --------------- ~~~~ * **AD / DA bridges** Don't worry! The user does not need to add AD or DA bridges. :) Please see: <> * **Please note the errors noted in the schematic: they seem to bugs in the Sandbox version** This example does nothing useful but shows how these devices can be used directly with analogue parts at the input and output. They **do** require a power supply because they behave like real devices: >their input thresholds and output voltages roughly track the supply voltage; >the outputs get more resistive at low supply voltages; >they stop working if the suppliy voltage drops too low; >their outputs drop to zero with zero supply voltage. Pure XSPICE devices do none of these good things. More about the logic devices: This is different from the logic gates in the EasyEDA Libs (which are based on XSPICE) in that it does not need the ADC and DAC Bridges to connect analogue signals, loads and probes into it. It is also different from logic gates in many other simulation tools because it does require a power supply. This is so that if a simulation is run with the supply ramped up from zero - to assist ngspice in finding the right initial conditions for the simulation - or if the sim is run at different supply voltages, then the input threshold levels and the output voltage swing track the supply voltage. Behavioural logic devices in many other simulators do not track the supply voltage and this can cause confusion where logic devices with a wide supply range such as 74C and 4000 series or some of the low voltage CMOS devices are used with variable or poorly regulated supplies. The supply pins for the device are named VDD for the positive and VSS for the negative rails respectively. To reduce the wires needed to be shown in the schematic, the VDD and VSS supply pins for the gate are hidden. To connect to them all that is needed is for a positive rail with a VDD netlabel and a negative rail with a VSS netlabel to exist in the schematic. This technique works even if the rails in the schematic actually have different names, such as RAIL and GND, as in this example. Alternatively, the rails can be wired directly to the device supply pins in the normal way. To do this the device pins must be made visible. Then the supply rail netlabels have no effect on the supply connectivity to the device. Select U1, press the 'I' hotkey and untick 'Hidden Pin' to show the supply pins. Other features of this EasyEDA logic device are that input and output over-rail voltage excursions are clamped to the appropriate rail and so will cause excessive current flow as seen in a real device. A supply voltage above an absolute maximum of approximately 18V or a reverse polarity will also cause excessive current flow. ** Please note: these new devices are NOT the same as the ones I have already put in the library and described in this thread:** <> and here: <> When I have done some more testing, the new logic devices will go into the library and any models already there of the same name (such as INVEE and NAND3EE etc) will be replaced. They will have the same function and behaviour but will then all be using the new models. :)
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