No images. Can't help. Post back with the url to a public project that demonstrates your issue please.

[https://easyeda.com/editor#id=9e425527fa38431193dd1ad487c30ac8](https://easyeda.com/editor#id=9e425527fa38431193dd1ad487c30ac8) This is a test board that demonstrates the issue I am having can not pour copper top or bottom Thanks Fred

Your project is private so only you can see it.

Have got a net called GND in your PCB?

[https://easyeda.com/account/project/setting/basic?project=84652e9531b5480b8a022d4f0d6353b5](https://easyeda.com/account/project/setting/basic?project=84652e9531b5480b8a022d4f0d6353b5) Yes I have a "gnd" net

            I hope I made it public ?

@lighthousepoint Hello ; Regarding your post, you only have one public project in your account so I assume that it is what you are talking about here in your post. The following image is related to your schematic design and it has no GND net  The following image shows the available nets that you can select for copper area  You can't make a copper area for bottom layer since you have only SMD component is your design which is placed in the top layer and once I select one of the two available nets for copper area I get the result of the following image :  As you see already the Resistor pad is attached to the copper area :) An advise regarding your PCB design, make sure that your tracks don't exceed the PCB outlines : 

@lighthousepoint, 1. If you want a copper area assigned to a net to fill then you **must** have a trace, pad or via assigned to that net within or overlapping that copper area on the PCB;  2. Vias or Multi-layer pads assigned to the same net as a copper area, within or overlapping that area will cause that area to fill;  3. Traces and single layer pads assigned to the same net as a copper area, **must** be on the same layer as the copper area as well as being within or overlapping the copper area in order for that copper area to fill.

Thanks Andy **"must** have a trace, pad or via assigned to that net within" I think that is my problem     Trying to have a copper ground plane on the bottom with only connections be made after edge mount connectors are soldered on. Very often I would have RF lines on the top with connections going to the board edge and need a full ground plane on the bottom. Thanks for your help Fred

"Trying to have a copper ground plane on the bottom with only connections be made after edge mount connectors are soldered on. " This should not be an issue. All components that are on - or form an intergral part of - a PCB must be represented in the schematic and therefore have a corresponding PCB footprint assigned to them. That way all the relevant nets and footprints get pulled into the PCB. It is then up to the designer to ensure that any single sided pads are connected to the other laters as required using vias or through hole pads etc as necessary. If you connector only has pads on the top layer but needs to connect to a plane on another layer it is worth considering making a footprint that deals with that by incorporating the necessary multilayer pads as part of its construction. For more on this please see: [https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6](https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6) Please also read (2.2) in (2) in: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a)

On some of my designs I can't use a schematic since they are made up of various lengths of transmission lines forming rf circuits. All require a bottom ground plane. I think adding a small pad and vias in order to establish a GND net on both sides may be good solution. Fred

"On some of my designs I can't use a schematic since they are made up of various lengths of transmission lines forming rf circuits." I agree that you can't easily represent transmission line sections in your schematic in the way you can in something like QUCS or Keysight's ADS but you can still draw a schematic with the relevant physical components in it and that will ensure that you do not have this kind of half formed error prone conversion to PCB. In fact there is nothing stopping you drawing your schematic in such a way that you can textually annotate and even symbolically represent the transmission line segments. If you construct PCB footprints (for your chosen transmission line structure on your chosen PCB stackup) out of suitably dimensioned pads and assign them to your transmission line symbols then, when you do Convert to PCB, you can even pull in suitably shaped and sized segments from which to start and end a transmission line section or, if you build yourself a library, even whole pre-dimensioned track segments.

Your suggestions have been very helpful, I have a much better  understanding of the issues now. Been experimenting using  vias on a couple designs and something that simple seems to work well. Fred