Unable to create a trace between 2 components , getting a circle with a cross
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pietjepuk 4 months ago
Hi Guys I really hope someone can help me out here , beem struggling most of the night to get this going , but i really am clueless. I am a newbie , so i'm learning on thefly, and i really don't care to being challenged. For this project i had to create a component (Which on it's own was challenging enough) there are 2 pads on the Card-edge PCB that i cannot get connected, one was a GND , (one of many, so i just disabled that one) The other one is D13 (pad 67) , i don't know if i made a mistake in designing the component, but it's strange that all others are working without a problem. I had a lot of problems with the autorouter, had to manualy adjust quite a few tracks to get it errorfree , except fot this one. i really hope someone can help me out on this ....  off to bed , to catch at least 3-4 hours of sleep Nevermind , after struggling again for some hours, i finally did a reshuffle of all components on the board and now it renders okay ....
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pietjepuk 4 months ago
Thanks Bee I use a local Router on my machine, there was a conflict between a pad 13 and a track() , it left me clueless , solved tons of issues last 4 weeks , but this one did not seem to be solveable. I finally turned ignore route conflict , and was able to force a connection, rerouted and the same error popped up. then i  started shuffling the components , and after a reroute it works ... no questions asked further. It seems that the cross with the circle is something that happens when you want to connect something with no possibilities. The new lib was created following the procedure as described, but thanks for trying to help me out
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pietjepuk 4 months ago
I already worked around the problem, just for trying to be some kind of help if someone else bumps into the same. This was the original problem, i could not find the problem , however solved it by relocating the resistors , then after a reroute the issue was gone. ![easyeda-error.jpg](//image.easyeda.com/pullimage/CQkELZZGTVxO1vHqQP2lge8P1L6Y16luQu1NRtAY.jpeg)
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JLCPCBsupport 4 months ago
Thanks for sharing all these info; It seems like you are having a clearance error which already appeared on the "Design Rule Checking" so make sure that the design rules follow the "PCB capabilities" that you can get from the following link to avoid any sort of production issues : [https://jlcpcb.com/capabilities/Kicad%20PCB%20to%20gerber%20files](https://jlcpcb.com/capabilities/Kicad%20PCB%20to%20gerber%20files) Keep up the good work.
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