could anyone tell me what is going on?.when i click generate gerber file ,it leaves me hanging.it only checks for DRC errors and that's it ,nothing else happens.
If you don't like to fix the DRC errors, you can click the No button to create Gerber
![image.png](//image.easyeda.com/pullimage/rNUlL9uGoXRWe4hjFADJLgvRsGvfgSJAqLiZcmko.png)
So, there is no DRC error, you can click the No to export Gerber file? Can you click the No Button ? ![image](https://image.easyeda.com/pullimage/rNUlL9uGoXRWe4hjFADJLgvRsGvfgSJAqLiZcmko.png)
please close the file and open again, and then generate the gerber. if your pcb is complicate, please wait few minutes.
if 5minutes later that still the same, please share your project woth public. we will take a look.
thanks
I had gotten DRC errors on my last board, and had to skip past it as everyone said. My board was simple enough for me to examine when I created the gerber files. Then when I was sure nothing was wrong, I submitted the board with a note about the DRC error with nothing listed. The PCB people replied and said that they found no DRC errors. Even now, when I examine the Gerber they show on the order, the board is perfect.
So this brings me to the buggy nature of the EasyEDa software. They should figure out how to reset all pointers in the software, and get rid of faulty DRC errors. i can imagine someone with a multilayers board going crazy with DRC errors that show nothing on the list. I tested my board, and purposely put a wire where it does not belong, then saved it and scanned for DRC errors, and it did put that error in the list, and put and X on the screen to identify it. So I removed the self inflicted error, saved the file, and scanned again for DRC, and I get a DRC error with nothing in the list. If they depend on us to make boards we are happy with, they need to put some time into fixing the EasyEDA software to autoroute better, and not generate faulty DRC errors. I do run the autorouter on my local machine, and it goes a 1000 times faster than when I run it from the internet. I am going to now post about a problem getting components that I should be able to get. They don't show up anymore.
@andyfierman no man,because there is no use of it if your schematic is a bit complicated,you have to make corrections anyway..those via holes appeared after i made the copper area.they didn't existed before.
@ttrotila,
Is this a private project?
If no, can you post the link to it?
If yes, can you post screenshots of the before and after you made the Copper Areas to show some of these bias that appeared?
@dillon
Hello,
Just some notes too that gerber creation dialog text where "NO" means YES and getting the Gerber files is far from logical.
Could the text be changed to " NO DRC check, but create the gerber files"
And update the tutor page also with:
Pressing the G-Gerber file creation button in toolbar will open a pop up:
Would you like to check the DRC before generating the Gerber files ?
YES or NO DRC check, but create the gerber files
YES means doing the DRC checks first in EASYEDA and then use again the G-Gerber file creation button and answer
"NO DRC check, but create the gerber files" to create finally the G-files.
After that the generate Gerber details for PCB dialog will open:
\*\*\*\*\*\*\*\*\*\*\*\*
The NO meaning YES is so irrational that it took some long time and googling to get the idea opened.
**Topic 2.**
I Installed the gerbv into ubuntu 18.04 and a working installation in Debian and Debian derivatives including Ubuntu requires:
\- install first the gerbv application from ubuntu packet manager
\- then [https://www.gtk.org/](https://www.gtk.org/) (how to install the _GTK+_ package)
\- do that with: sudo apt install libgtk\-3\-dev
- [https://www.cairographics.org/](https://www.cairographics.org/) and there [https://www.cairographics.org/download/](https://www.cairographics.org/download/)
\- sudo apt\-get install lib_cairo_2-dev
And then to the problem:
After opening the gerber files into ubuntu gerbv application:
Gerber_BoardOutline.GKO
Gerber_BottomLayer.GBL
Gerber_BottomSilkLayer.GBO
Gerber_BottomSolderMaskLayer.GBS
Gerber\_drill\_NPTH\.DRL
Gerber\_drill\_PTH\.DRL
Gerber_TopLayer.GTL
Gerber_TopSilkLayer.GTO
Gerber_TopSolderMaskLayer.GTS
I get this application message:
![Screenshot gerbv.png](//image.easyeda.com/pullimage/EH8BM2GFnkAQ33W7FSRAcj7Kuo1yL8lV93yoMQHz.png)
Any idea what is wrong in the files that a standard product for reading **RS-274X** files makes above error message ?
Then is there good tutorial what kind of specific gerber files check should be done to ensure that the gerber files are ok for PCB ordering.
Kind of critical checks list would be appreciated.
I found this checklist with #6 & #24 in
[https://easyeda\.com/forum/topic/Essential\_checks\_before\_placing\_a\_PCB\_order\-UuohztL3l](https://easyeda.com/forum/topic/Essential_checks_before_placing_a_PCB_order-UuohztL3l)
Sorry for long story.... I have never used before such an intuitive easy to learn technical software - thanks a lot to the creators of EasyEda !
PS.
Any update when auto router next release is coming in the roadmap ?
@prefour,
Thank you for your appreciation of the work that Dillon and everyone else at EasyEDA, LCSC and JLCPCB are putting in to this fantastic tool suite.
The PCB checklist and another for Schematics are referred to in:
[https://easyeda\.com/andyfierman/Welcome\_to\_EasyEDA\-31e1288f882e49e582699b8eb7fe9b1f](https://easyeda.com/andyfierman/Welcome_to_EasyEDA-31e1288f882e49e582699b8eb7fe9b1f)
together with some other stuff about how to get the best out of EasyEDA.
:)
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