I was trying to design a simple amplifier circuit in simulation mode in EasyEDA, and after connecting to GND and VCC netlabels, I was very confused as to why it was telling me I had no voltage sources, once I tried to run the simulation in DC OP mode; specifically, this message: _"Current circuit doesn't has Voltage Resource or Current Resource symbol, please place it first at left side EELib or Spice Library"_ After digging a bit, it seems like VCC/GND netlabels are not being associated with a voltage source anymore. I tried opening this circuit [https://easyeda.com/andyfierman/vcc-vs-5v-netflag-problem](https://easyeda.com/andyfierman/vcc-vs-5v-netflag-problem) , which mentions a slightly different problem triggered by two voltage sources in the same net, and: \- for Sheet1 \(an example presented as working\) File \-\> Export Netlist \-\> LTSpice fails with the same error \- for Sheet4 \(also presented as working\)\, it ignores all Netlabel voltage sources in the export Is this intentional, or a regression? For anyone with the same issue, I managed to circumvent it by replacing all voltage netlabels by its explicit equivalent: a DC source connected to GND.