Click on the error and read what it ways.Without at least a screenshot it's hard to guess what the error on YOUR screen looks like. But usually the default Via diameter and the default DRC setting for Via diameter is different, so each time you place a via without changing the parameters, it's going to show up in the DRC. Is this what's happening? I purposefully edited the via in the light blue rectangles so they are smaller than my design rules. You can see I have a DRC Error. If I click on it, it selects the object with the error and shows in the lower left side what it is, what it is breaking etc. You can see the parameters of my via and the default design rules.  <br> One potential fix is edit the design rules to match your vias, but be sure the PCB manufacturer can supply that. Another would be to select all the vias and changing their parameters to suite your design rules. Right click on a via with a DRC error, click on select similar objects and set the diameter and drill diameter so "same" and press find. I will select all the vias with the same parameters and change them in the top right box to the DRC supported values.  <br> <br> Hope this fixes your issue, if not please provide more info!

Another possibility is that you have swapped between mil and mm units and there is now a rounding error. I haven't got a  pc to hand but IIRC,  to check and correct, open the design rules and note the values then swap to the other units and check again. Then swap back to the first set of units to see if they now match the first set of values. There are a number of posts about this already in the forum.

Try Googling: eadyeda rounding error design rule

By increasing the via to .001 larger than the DRC the via issue was resolved. I now have this clearance DRC. I'm not sure why pin 5 shows something other than GND. That is what's on the schematic. The auto trace wants it connected to pin 6 but when I do it shows the clearance issue. DRC rules are okay for clearance.

Look closely at pin 5 in the schematic. Check it's connectivity and Cross check it in the Schematic and the PCB Design Managers. Check the symbol pin to Footprint pad mapping in the Footprint Manager. Otherwise please post the url to a public project that demonstrates this issue.

Thanks Andy, I found something hiding behind U4-5.