I started out with a 2 layer design. Switched to a 4 layer design. Layer 1 signal, layer 2 GND, layer 3 5V, layer 4 signal. With layer 3 set to plane with net: 5V OR plane 3 set to signal with a copper pour to net: 5V whenever i drop a via on layer 1 from the 5V net the via always ends up connecting to BOTH the 5V plane on layer 3 (or the 5V copper pour) AND the GND plane on layer 2. I of course only want the via to connect to the 5V plane on layer 3 not short the two planes together! I thought the vias were smart enough to only connect to planes with the same net.
Electron
4.2.10
Windows
81
EasyEDA
6.4.25