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Waveform not displayed after transient simulation

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Eusebius 8 years ago

Hi, this is a SPICE newbie question. I used a non-inverter amplifier circuit (with LM741) to play with SPICE simulation in EasyEDA: https://easyeda.com/editor#id=7mIC8NHBT When I launch a transient sim (be it with a 1V DC input or with a sine), I'm quite happy with the initial conditions shown in the results (at least regarding the nodes I have named myself), I'm reasonably happy with the 1012 data rows it claims, but I'm a bit frustrated by the absence of a waveform. What have I done wrong this time? My simulation results (1V DC input): Circuit: untitled Reducing trtol to 1 for xspice 'A' devices Doing analysis at TEMP = 27.000000 and TNOM = 27.000000 Initial Transient Solution -------------------------- Node Voltage ---- ------- xu2.11 14.9602 xu2.12 14.9601 xu2.6 -0.000858624 xu2.7 11.7991 vs 9.99926 xu2.53 12.4 xu2.54 -12.4 xu2.90 11.9991 xu2.91 25 xu2.92 -25 -vee -15 vcc 15 xu2.99 0 xu2.10 0.402537 v- 0.99989 xu2.13 0.416472 v+ 0.99996 xu2.14 0.416497 xu2.9 0 xu2.8 11.7991 e 1 h.xu2.hlim#branch -2.39982e-11 v.xu2.vlim#branch 0.0119991 v1#branch -8.02178e-08 v3#branch -0.00166656 v4#branch -0.0016667 v.xu2.vln#branch -3.69999e-11 v.xu2.vlp#branch -1.30017e-11 v.xu2.ve#branch 2.24001e-11 v.xu2.vc#branch 2.40154e-12 v.xu2.vb#branch -8.58624e-09 a$poly$e.xu2.egnd#branch_1_0 -0.0119991 No. of Data Rows : 1008 ngspice-26 done Thanks in advance.

Comments

andyfierman 8 years ago

Hi Eusebius, The problem net is the `v+` net with the `V+` probe you have placed on it. Nothing wrong with what you've done. It would appear that it does not like having a netname with a `+` in it *that is then the target of a probe statement* (check out the **Super Menu > Miscellaneous > Netlist for Document > spice** or **Download netlist** from the **Simulation Results** wndow to see this). ngspice is happy if you delete the volprobe so it's not the netname itself. The problem arises when you put the volprobe named `v+` ( or `v+` as spice is case insensitive) on the net. The causes ngspice to insert a `probe` statement for the voltage on the `v+` net. Like this: `probe V(v+)` I suspect the problem is that ngspice is then (erroneously) expecting to see something after the `+` character so it does not generate any probe data. There is clearly a problem in ngspice because it then does not throw an error or even a warning to say it can't show you a vector of results for `v+` (unlike the case for probing ground that I described in your earlier post). I think this is a bug in ngspice. Or perhaps just a quirk of the syntax of ngspice. ngspice is free and open source software but is nothing to do with EasyEDA. I will submit a bug report to them and hopefully it will get fixed quite quickly. It may take longer to ripple through to EasyEDA. * In the meanwhile the fix is simple! Don't use `+` or `-` characters in netnames. (BTW: you cannot use space characters either.) If you replace `V+` with `Vp` in the netname and the volprobe, ngspice is happy again. Also: for the same reason it is safest to rename `-VEE` simply to `VEE`. In fact `VEE` is negative by definition so the `-` character prefix is unneccessary and in fact confusing. Similarly for `VSS` in CMOS and other MOSFET circuits and chip. * Note: ngspice also sometime gets itself in a tizz when a `-` character is place in front of voltage or current in a probe or a other expression. In the unlikely (at your stage of spice useage) event that you encounter a need to negate a voltage or current, it is usually possible to avoid this problem by replacing an implcit negation by a `-` prefix with an explcit negation by `-1*`.

Eusebius 8 years ago

Thanks again for your swift reply and all the useful info. I knew about space characters, but I'll be more careful with other non-alphabetic characters now...

andyfierman 8 years ago

The ngspice manual itself is less than clear about the issue of naming conventions: http://ngspice.sourceforge.net/docs/ngspice-manual.pdf#subsection.2.1.3 :)

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